MC68HC908JK8CP Freescale Semiconductor, MC68HC908JK8CP Datasheet - Page 77

• Manufacturer Part Number: MC68HC908JK8CP
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC908JK8CP

• Cpu Family: HC08
• Device Core Size: 8b
• Frequency (max): 8MHz
• Interface Type: SCI
• Program Memory Type: Flash
• Program Memory Size: 8KB
• Total Internal Ram Size: 256Byte
• # I/os (max): 15
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 13-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Through Hole
• Pin Count: 20
• Package Type: PDIP
• Lead Free Status / Rohs Status: Not Compliant

PIN — External Reset Bit
COP — Computer Operating Properly Reset Bit
ILOP — Illegal Opcode Reset Bit
ILAD — Illegal Address Reset Bit (opcode fetches only)
MODRST — Monitor Mode Entry Module Reset bit
LVI — Low Voltage Inhibit Reset bit
5.7.3 Break Flag Control Register (BFCR)
The break control register contains a bit that enables software to clear status bits while the MCU is in a
break state.
BCFE — Break Clear Flag Enable Bit
Freescale Semiconductor
This read/write bit enables software to clear status bits by accessing status registers while the MCU is
in a break state. To clear status bits during the break state, the BCFE bit must be set.
1 = Last reset caused by external reset pin (RST)
0 = POR or read of RSR
1 = Last reset caused by COP counter
0 = POR or read of RSR
1 = Last reset caused by an illegal opcode
0 = POR or read of RSR
1 = Last reset caused by an opcode fetch from an illegal address
0 = POR or read of RSR
1 = Last reset caused by monitor mode entry when vector locations $FFFE and $FFFF are $FF after
0 = POR or read of RSR
1 = Last reset caused by LVI circuit
0 = POR or read of RSR
1 = Status bits clearable during break
0 = Status bits not clearable during break
POR while IRQ = V
Address:
Reset:
Read:
Write:
MC68HC908JL8/JK8 • MC68HC08JL8/JK8 • MC68HC908KL8 Data Sheet, Rev. 3.1
$FE03
BCFE
Bit 7
R
0
Figure 5-22. Break Flag Control Register (BFCR)
= Reserved
DD
R
6
R
5
R
4
R
3
R
2
R
1
Bit 0
R
SIM Registers
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