MC68HC908JK8CP Freescale Semiconductor, MC68HC908JK8CP Datasheet - Page 74

• Manufacturer Part Number: MC68HC908JK8CP
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC908JK8CP

• Cpu Family: HC08
• Device Core Size: 8b
• Frequency (max): 8MHz
• Interface Type: SCI
• Program Memory Type: Flash
• Program Memory Size: 8KB
• Total Internal Ram Size: 256Byte
• # I/os (max): 15
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 13-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Through Hole
• Pin Count: 20
• Package Type: PDIP
• Lead Free Status / Rohs Status: Not Compliant

System Integration Module (SIM)
5.6.2 Stop Mode
In stop mode, the SIM counter is reset and the system clocks are disabled. An interrupt request from a
module can cause an exit from stop mode. Stacking for interrupts begins after the selected stop recovery
time has elapsed. Reset or break also causes an exit from stop mode.
The SIM disables the oscillator signals (OSCOUT) in stop mode, stopping the CPU and peripherals. Stop
recovery time is selectable using the SSREC bit in the configuration register 1 (CONFIG1). If SSREC is
set, stop recovery is reduced from the normal delay of 4096 ICLK cycles down to 32. This is ideal for
applications using canned oscillators that do not require long start-up times from stop mode.
A break interrupt during stop mode sets the SIM break stop/wait bit (SBSW) in the break status register
(BSR).
The SIM counter is held in reset from the execution of the STOP instruction until the beginning of stop
recovery. It is then used to time the recovery period.
74
EXITSTOPWAIT
NOTE: EXITSTOPWAIT =
External crystal applications should use the full stop recovery time by
clearing the SSREC bit.
To minimize stop current, all pins configured as inputs should be driven to
a logic 1 or logic 0.
ICLK
MC68HC908JL8/JK8 • MC68HC08JL8/JK8 • MC68HC908KL8 Data Sheet, Rev. 3.1
RST
IDB
IAB
IAB
IDB
$A6
Figure 5-16. Wait Recovery from Interrupt or Break
$A6
Figure 5-17. Wait Recovery from Internal Reset
$6E0B
$A6
$6E0B
$A6
RST
pin OR CPU interrupt OR break interrupt
$A6
$A6
Cycles
32
$6E0C
NOTE
NOTE
$01
Figure 5-18
Cycles
$00FF
32
$0B
$00FE
shows stop mode entry timing.
$6E
RST VCT H
$00FD
RST VCT L
$00FC
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