MC68HC908JK8CP Freescale Semiconductor, MC68HC908JK8CP Datasheet - Page 168

• Manufacturer Part Number: MC68HC908JK8CP
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC908JK8CP

• Cpu Family: HC08
• Device Core Size: 8b
• Frequency (max): 8MHz
• Interface Type: SCI
• Program Memory Type: Flash
• Program Memory Size: 8KB
• Total Internal Ram Size: 256Byte
• # I/os (max): 15
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 13-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Through Hole
• Pin Count: 20
• Package Type: PDIP
• Lead Free Status / Rohs Status: Not Compliant

Keyboard Interrupt Module (KBI)
13.4 Functional Description
Writing to the KBIE7–KBIE0 bits in the keyboard interrupt enable register independently enables or
disables each port A pin as a keyboard interrupt pin. Enabling a keyboard interrupt pin in port A also
enables its internal pull-up device regardless of PTAPUEx bits in the port A input pull-up enable register
(see
latches a keyboard interrupt request.
A keyboard interrupt is latched when one or more keyboard pins goes low after all were high. The MODEK
bit in the keyboard status and control register controls the triggering mode of the keyboard interrupt.
If the MODEK bit is set, the keyboard interrupt pins are both falling edge- and low level-sensitive, and both
of the following actions must occur to clear a keyboard interrupt request:
The vector fetch or software clear and the return of all enabled keyboard interrupt pins to logic 1 may occur
in any order.
168
KBI0
KBI7
TO PULLUP ENABLE
TO PULLUP ENABLE
•
•
•
•
NOTE:
11.2.3 Port A Input Pull-Up Enable
If the keyboard interrupt is edge-sensitive only, a falling edge on a keyboard pin does not latch an
interrupt request if another keyboard pin is already low. To prevent losing an interrupt request on
one pin because another pin is still low, software can disable the latter pin while it is low.
If the keyboard interrupt is falling edge- and low level-sensitive, an interrupt request is present as
long as any keyboard pin is low.
Vector fetch or software clear — A vector fetch generates an interrupt acknowledge signal to clear
the interrupt request. Software may generate the interrupt acknowledge signal by writing a logic 1
to the ACKK bit in the keyboard status and control register KBSCR. The ACKK bit is useful in
applications that poll the keyboard interrupt pins and require software to clear the keyboard
interrupt request. Writing to the ACKK bit prior to leaving an interrupt service routine can also
prevent spurious interrupts due to noise. Setting ACKK does not affect subsequent transitions on
the keyboard interrupt pins. A falling edge that occurs after writing to the ACKK bit latches another
interrupt request. If the keyboard interrupt mask bit, IMASKK, is clear, the CPU loads the program
counter with the vector address at locations $FFE0 and $FFE1.
Return of all enabled keyboard interrupt pins to logic 1 — As long as any enabled keyboard
interrupt pin is at logic 0, the keyboard interrupt remains set.
To prevent false interrupts, user should use software
to debounce keyboard interrupt inputs.
KBIE0
KBIE7
MC68HC908JL8/JK8 • MC68HC08JL8/JK8 • MC68HC908KL8 Data Sheet, Rev. 3.1
.
.
.
Figure 13-2. Keyboard Interrupt Block Diagram
MODEK
Registers). A logic 0 applied to an enabled keyboard interrupt pin
V
DD
D
CK
CLR
Q
INTERRUPT FF
KEYBOARD
RESET
ACKK
VECTOR FETCH
INTERNAL BUS
DECODER
IMASKK
SYNCHRONIZER
Freescale Semiconductor
KEYF
KEYBOARD
INTERRUPT
REQUEST