MC68HC908JK8CP Freescale Semiconductor, MC68HC908JK8CP Datasheet - Page 43

• Manufacturer Part Number: MC68HC908JK8CP
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC908JK8CP

• Cpu Family: HC08
• Device Core Size: 8b
• Frequency (max): 8MHz
• Interface Type: SCI
• Program Memory Type: Flash
• Program Memory Size: 8KB
• Total Internal Ram Size: 256Byte
• # I/os (max): 15
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 13-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Through Hole
• Pin Count: 20
• Package Type: PDIP
• Lead Free Status / Rohs Status: Not Compliant

3.4 Configuration Register 2 (CONFIG2)
IRQPUD — IRQ Pin Pull-Up Disable Bit
LVIT1, LVIT0 — LVI Trip Voltage Selection Bits
STOP_ICLKDIS — Internal Oscillator Stop Mode Disable Bit
3.5 Mask Option Register (MOR)
The mask option register (MOR) is implemented as a byte within the FLASH memory, and therefore can
only be written during a programming sequence of the FLASH memory. This register is read after a
power-on reset to determine the type of oscillator selected. (See
OSCSEL — Oscillator Select Bit
Freescale Semiconductor
IRQPUD disconnects the internal pull-up on the IRQ pin.
Detail description of trip voltage selection is given in
Setting STOP_ICLKDIS disables the internal oscillator during stop mode. When this bit is cleared, the
internal oscillator continues to operate in stop mode. Reset clears this bit.
OSCSEL selects the oscillator type for the MCU. The erased or unprogrammed state of this bit is
logic 1, selecting the crystal oscillator option. This bit is unaffected by reset.
1 = Internal pull-up is disconnected
0 = Internal pull-up is connected between IRQ pin and V
1 = Internal oscillator disabled during stop mode
0 = Internal oscillator enabled during stop mode
1 = Crystal oscillator
0 = RC oscillator
One-time writable register after each reset. LVIT1 and LVIT0 reset to logic 0 by a power-on reset (POR) only.
Non-volatile FLASH register; write by programming.
Address:
Address:
Erased:
Reset:
Reset:
Read:
Read:
Write:
Write:
POR:
MC68HC908JL8/JK8 • MC68HC08JL8/JK8 • MC68HC908KL8 Data Sheet, Rev. 3.1
OSCSEL
IRQPUD
$FFD0
$001E
Bit 7
Bit 7
R
R
0
0
1
Figure 3-2. Configuration Register 2 (CONFIG2)
Figure 3-3. Mask Option Register (MOR)
= Reserved
= Reserved
R
R
6
0
0
6
1
R
R
5
0
0
5
1
Not affected Not affected
Unaffected by reset
LVIT1
R
4
0
4
1
Chapter 15 Low Voltage Inhibit
LVIT0
R
3
0
3
1
DD
Chapter 6 Oscillator
R
R
2
0
0
2
1
Configuration Register 2 (CONFIG2)
R
R
1
0
0
1
1
ICLKDIS
STOP_
(OSC).)
Bit 0
Bit 0
(LVI).
R
0
0
1
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