MC68HC908JK8CP Freescale Semiconductor, MC68HC908JK8CP Datasheet - Page 158

• Manufacturer Part Number: MC68HC908JK8CP
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC908JK8CP

• Cpu Family: HC08
• Device Core Size: 8b
• Frequency (max): 8MHz
• Interface Type: SCI
• Program Memory Type: Flash
• Program Memory Size: 8KB
• Total Internal Ram Size: 256Byte
• # I/os (max): 15
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 13-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Through Hole
• Pin Count: 20
• Package Type: PDIP
• Lead Free Status / Rohs Status: Not Compliant

Input/Output (I/O) Ports
11.4.1 Port D Data Register (PTD)
The port D data register contains a data latch for each of the eight port D pins.
PTD[7:0] — Port D Data Bits
ADC11–ADC8 — ADC channels 11 to 8
T1CH1, T1CH0 — Timer 1 Channel I/Os
TxD, RxD — SCI Data I/O Pins
11.4.2 Data Direction Register D (DDRD)
Data direction register D determines whether each port D pin is an input or an output. Writing a logic 1 to
a DDRD bit enables the output buffer for the corresponding port D pin; a logic 0 disables the output buffer.
For those devices packaged in a 20-pin package, PTD0–PTD1 and are not connected. DDRD0–DDRD1
should be set to a 1 to configure PTD0–PTD1 as outputs.
158
These read/write bits are software programmable. Data direction of each port D pin is under the control
of the corresponding bit in data direction register D. Reset has no effect on port D data.
ADC[11:8] are pins used for the input channels to the analog-to-digital converter module. The channel
select bits, ADCH[4:0], in the ADC status and control register define which port pin will be used as an
ADC input and overrides any control from the port I/O logic. See
Converter
The T1CH1 and T1CH0 pins are the TIM1 input capture/output compare pins. The edge/level select
bits, ELSxB:ELSxA, determine whether the PTD4/T1CH0 and PTD5/T1CH1 pins are timer channel I/O
pins or general-purpose I/O pins. See
The TxD and RxD pins are the transmit data output and receive data input for the SCI module. The
enable SCI bit, ENSCI, in the SCI control register 1 enables the PTD6/TxD and PTD7/RxD pins as SCI
TxD and RxD pins and overrides any control from the port I/O logic. See
Communications Interface
Alternative Functions:
Additional Functions
(ADC).
MC68HC908JL8/JK8 • MC68HC08JL8/JK8 • MC68HC908KL8 Data Sheet, Rev. 3.1
Address:
Reset:
Read:
Write:
(Slow Edge)
25mA sink
$0003
pull-up
PTD7
(Sink)
Bit 7
LED
RxD
(SCI).
Figure 11-10. Port D Data Register (PTD)
(Slow Edge)
25mA sink
pull-up
PTD6
(Sink)
TxD
LED
6
Chapter 8 Timer Interface Module
T1CH1
PTD5
5
NOTE
T1CH0
Unaffected by reset
PTD4
4
(Sink)
ADC8
PTD3
LED
3
Chapter 10 Analog-to-Digital
(Sink)
ADC9
PTD2
LED
2
(TIM).
Chapter 9 Serial
ADC10
PTD1
1
Freescale Semiconductor
ADC11
PTD0
Bit 0