MC68HC908JK8CP Freescale Semiconductor, MC68HC908JK8CP Datasheet - Page 161

• Manufacturer Part Number: MC68HC908JK8CP
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC908JK8CP

• Cpu Family: HC08
• Device Core Size: 8b
• Frequency (max): 8MHz
• Interface Type: SCI
• Program Memory Type: Flash
• Program Memory Size: 8KB
• Total Internal Ram Size: 256Byte
• # I/os (max): 15
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 13-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Through Hole
• Pin Count: 20
• Package Type: PDIP
• Lead Free Status / Rohs Status: Not Compliant

T2CH1, T2CH0 — Timer 2 Channel I/Os
11.5.2 Data Direction Register E (DDRE)
Data direction register E determines whether each port E pin is an input or an output. Writing a logic 1 to
a DDRE bit enables the output buffer for the corresponding port E pin; a logic 0 disables the output buffer.
For those devices packaged in a 20-pin package and 28-pin package, PTE0–PTE1 are not connected.
DDRE0–DDRE1 should be set to a 1 to configure PTE0–PTE1 as outputs.
DDRE[1:0] — Data Direction Register E Bits
Freescale Semiconductor
The T2CH1 and T2CH0 pins are the TIM2 input capture/output compare pins. The edge/level select
bits, ELSxB:ELSxA, determine whether the PTE0/T2CH0 and PTE1/T2CH1 pins are timer channel I/O
pins or general-purpose I/O pins. See
These read/write bits control port E data direction. Reset clears DDRE[1:0], configuring all port E pins
as inputs.
1 = Corresponding port E pin configured as output
0 = Corresponding port E pin configured as input
Address:
Avoid glitches on port E pins by writing to the port E data register before
changing data direction register E bits from 0 to 1.
port E I/O logic.
Reset:
Read:
Write:
MC68HC908JL8/JK8 • MC68HC08JL8/JK8 • MC68HC908KL8 Data Sheet, Rev. 3.1
READ DDRE ($000C)
WRITE DDRE ($000C)
WRITE PTE ($0008)
READ PTE ($0008)
$000C
Bit 7
0
Figure 11-15. Data Direction Register E (DDRE)
6
0
RESET
Figure 11-16. Port E I/O Circuit
Chapter 8 Timer Interface Module
5
0
NOTE
NOTE
DDREx
PTEx
4
0
3
0
Figure 11-16
2
0
(TIM).
DDRE1
1
0
shows the
To TIM2
DDRE0
Bit 0
PTEx
0
Port E
161