MC68HC908JK8CP Freescale Semiconductor, MC68HC908JK8CP Datasheet - Page 64

• Manufacturer Part Number: MC68HC908JK8CP
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC908JK8CP

• Cpu Family: HC08
• Device Core Size: 8b
• Frequency (max): 8MHz
• Interface Type: SCI
• Program Memory Type: Flash
• Program Memory Size: 8KB
• Total Internal Ram Size: 256Byte
• # I/os (max): 15
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 13-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Through Hole
• Pin Count: 20
• Package Type: PDIP
• Lead Free Status / Rohs Status: Not Compliant

System Integration Module (SIM)
5.3 Reset and System Initialization
The MCU has these reset sources:
All of these resets produce the vector $FFFE–$FFFF ($FEFE–$FEFF in Monitor mode) and assert the
internal reset signal (IRST). IRST causes all registers to be returned to their default values and all
modules to be returned to their reset states.
An internal reset clears the SIM counter (see 5.4 SIM Counter), but an external reset does not. Each of
the resets sets a corresponding bit in the reset status register (RSR). (See
5.3.1 External Pin Reset
The RST pin circuits include an internal pull-up device. Pulling the asynchronous RST pin low halts all
processing. The PIN bit of the reset status register (RSR) is set as long as RST is held low for a minimum
of 67 ICLK cycles, assuming that the POR was not the source of the reset. See
Figure 5-4
5.3.2 Active Resets from Internal Sources
All internal reset sources actively pull the RST pin low for 32 ICLK cycles to allow resetting of external
peripherals. The internal reset signal IRST continues to be asserted for an additional 32 cycles
(Figure
(See
cycles during which the SIM forces the RST pin low. The internal reset signal then follows the sequence
from the falling edge of RST shown in
64
•
•
•
•
•
•
Figure 5-6 . Sources of Internal
Power-on reset module (POR)
External reset pin (RST)
Computer operating properly module (COP)
Low-voltage inhibit module (LVI)
Illegal opcode
Illegal address
5-5). An internal reset can be caused by an illegal address, illegal opcode, COP time-out, or POR.
shows the relative timing.
ICLK
RST
IAB
MC68HC908JL8/JK8 • MC68HC08JL8/JK8 • MC68HC908KL8 Data Sheet, Rev. 3.1
Reset Type
All others
PC
POR
Figure 5-4. External Reset Timing
Reset.) Note that for POR resets, the SIM cycles through 4096 ICLK
Table 5-2. PIN Bit Set Timing
Figure
5-5.
Number of Cycles Required to Set PIN
4163 (4096 + 64 + 3)
67 (64 + 3)
VECT H
VECT L
5.7 SIM
Table 5-2
Freescale Semiconductor
Registers.)
for details.