MC68HC908JK8CP Freescale Semiconductor, MC68HC908JK8CP Datasheet - Page 175

MC68HC908JK8CP

Manufacturer Part Number
MC68HC908JK8CP
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68HC908JK8CP

Cpu Family
HC08
Device Core Size
8b
Frequency (max)
8MHz
Interface Type
SCI
Program Memory Type
Flash
Program Memory Size
8KB
Total Internal Ram Size
256Byte
# I/os (max)
15
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
13-chx8-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
20
Package Type
PDIP
Lead Free Status / Rohs Status
Not Compliant

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14.3.7 COPRS (COP Rate Select)
The COPRS signal reflects the state of the COP rate select bit (COPRS) in the configuration register 1.
COPRS — COP Rate Select Bit
COPD — COP Disable Bit
14.4 COP Control Register
The COP control register is located at address $FFFF and overlaps the reset vector. Writing any value to
$FFFF clears the COP counter and starts a new timeout period. Reading location $FFFF returns the low
byte of the reset vector.
14.5 Interrupts
The COP does not generate CPU interrupt requests.
14.6 Monitor Mode
The COP is disabled in monitor mode when V
14.7 Low-Power Modes
The WAIT and STOP instructions put the MCU in low-power consumption standby modes.
Freescale Semiconductor
COPRS selects the COP timeout period. Reset clears COPRS.
COPD disables the COP module.
1 = COP timeout period is (2
0 = COP timeout period is (2
1 = COP module disabled
0 = COP module enabled
Address:
Address:
Reset:
Read:
Write:
Reset:
Read:
Write:
MC68HC908JL8/JK8 • MC68HC08JL8/JK8 • MC68HC908KL8 Data Sheet, Rev. 3.1
COPRS
$001F
$FFFF
Bit 7
Bit 7
R
0
Figure 14-2. Configuration Register 1 (CONFIG1)
Figure 14-3. COP Control Register (COPCTL)
= Reserved
R
6
0
6
13
18
– 2
– 2
4
4
) ICLK cycles
) ICLK cycles
R
5
0
5
TST
Low byte of reset vector
Unaffected by reset
is present on the IRQ pin or on the RST pin.
Clear COP counter
LVID
4
0
4
R
3
3
0
SSREC
2
2
0
STOP
1
1
0
COP Control Register
COPD
Bit 0
Bit 0
0
175

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