MC68HC908JK8CP Freescale Semiconductor, MC68HC908JK8CP Datasheet - Page 179

• Manufacturer Part Number: MC68HC908JK8CP
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC908JK8CP

• Cpu Family: HC08
• Device Core Size: 8b
• Frequency (max): 8MHz
• Interface Type: SCI
• Program Memory Type: Flash
• Program Memory Size: 8KB
• Total Internal Ram Size: 256Byte
• # I/os (max): 15
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 13-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Through Hole
• Pin Count: 20
• Package Type: PDIP
• Lead Free Status / Rohs Status: Not Compliant

Chapter 16
Break Module (BREAK)
16.1 Introduction
This section describes the break module. The break module can generate a break interrupt that stops
normal program flow at a defined address to enter a background program.
16.2 Features
Features of the break module include the following:
16.3 Functional Description
When the internal address bus matches the value written in the break address registers, the break module
issues a breakpoint signal (BKPT) to the SIM. The SIM then causes the CPU to load the instruction
register with a software interrupt instruction (SWI) after completion of the current CPU instruction. The
program counter vectors to $FFFC and $FFFD ($FEFC and $FEFD in monitor mode).
The following events can cause a break interrupt to occur:
When a CPU generated address matches the contents of the break address registers, the break interrupt
begins after the CPU completes its current instruction. A return from interrupt instruction (RTI) in the break
routine ends the break interrupt and returns the MCU to normal operation.
structure of the break module.
Freescale Semiconductor
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Accessible I/O registers during the break Interrupt
CPU-generated break interrupts
Software-generated break interrupts
COP disabling during break interrupts
A CPU-generated address (the address in the program counter) matches the contents of the break
address registers.
Software writes a logic one to the BRKA bit in the break status and control register.
MC68HC908JL8/JK8 • MC68HC08JL8/JK8 • MC68HC908KL8 Data Sheet, Rev. 3.1
IAB[15:0]
Figure 16-1. Break Module Block Diagram
BREAK ADDRESS REGISTER HIGH
BREAK ADDRESS REGISTER LOW
8-BIT COMPARATOR
8-BIT COMPARATOR
IAB[7:0]
IAB[15:8]
CONTROL
Figure 16-1
BKPT
(TO SIM)
shows the
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