MC68HC908JK8CP Freescale Semiconductor, MC68HC908JK8CP Datasheet - Page 166

• Manufacturer Part Number: MC68HC908JK8CP
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC908JK8CP

• Cpu Family: HC08
• Device Core Size: 8b
• Frequency (max): 8MHz
• Interface Type: SCI
• Program Memory Type: Flash
• Program Memory Size: 8KB
• Total Internal Ram Size: 256Byte
• # I/os (max): 15
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 13-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Through Hole
• Pin Count: 20
• Package Type: PDIP
• Lead Free Status / Rohs Status: Not Compliant

External Interrupt (IRQ)
12.5 IRQ Status and Control Register (INTSCR)
The IRQ status and control register (INTSCR) controls and monitors operation of the IRQ module. The
INTSCR has the following functions:
IRQF — IRQ Flag Bit
ACK — IRQ Interrupt Request Acknowledge Bit
IMASK — IRQ Interrupt Mask Bit
MODE — IRQ Edge/Level Select Bit
IRQPUD — IRQ Pin Pull-Up Disable Bit
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This read-only status bit is high when the IRQ interrupt is pending.
Writing a logic one to this write-only bit clears the IRQ latch. ACK always reads as logic zero. Reset
clears ACK.
Writing a logic one to this read/write bit disables IRQ interrupt requests. Reset clears IMASK.
This read/write bit controls the triggering sensitivity of the IRQ pin. Reset clears MODE.
IRQPUD disconnects the internal pull-up on the IRQ pin.
1 = IRQ interrupt pending
0 = IRQ interrupt not pending
1 = IRQ interrupt requests disabled
0 = IRQ interrupt requests enabled
1 = IRQ interrupt requests on falling edges and low levels
0 = IRQ interrupt requests on falling edges only
1 = Internal pull-up is disconnected
0 = Internal pull-up is connected between IRQ pin and V
Shows the state of the IRQ flag
Clears the IRQ latch
Masks IRQ and interrupt request
Controls triggering sensitivity of the IRQ interrupt pin
Address:
Address:
Reset:
Reset:
Read:
Read:
Write:
Write:
POR:
MC68HC908JL8/JK8 • MC68HC08JL8/JK8 • MC68HC908KL8 Data Sheet, Rev. 3.1
IRQPUD
Figure 12-3. IRQ Status and Control Register (INTSCR)
$001D
$001E
Bit 7
Bit 7
R
0
0
0
0
Figure 12-4. Configuration Register 2 (CONFIG2)
= Unimplemented
= Reserved
R
6
0
0
6
0
0
R
5
0
0
5
0
0
Not affected Not affected
LVIT1
4
0
0
4
0
LVIT0
IRQF
3
0
3
0
DD
ACK
R
2
0
2
0
0
IMASK
R
1
0
1
0
0
Freescale Semiconductor
MODE
Bit 0
Bit 0
R
0
0
0