MC68HC908JK8CP Freescale Semiconductor, MC68HC908JK8CP Datasheet - Page 85

MC68HC908JK8CP

Manufacturer Part Number
MC68HC908JK8CP
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68HC908JK8CP

Cpu Family
HC08
Device Core Size
8b
Frequency (max)
8MHz
Interface Type
SCI
Program Memory Type
Flash
Program Memory Size
8KB
Total Internal Ram Size
256Byte
# I/os (max)
15
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
13-chx8-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
20
Package Type
PDIP
Lead Free Status / Rohs Status
Not Compliant

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Chapter 7
Monitor ROM (MON)
7.1 Introduction
This section describes the monitor ROM (MON) and the monitor mode entry methods. The monitor ROM
allows complete testing of the MCU through a single-wire interface with a host computer. This mode is
also used for programming and erasing of FLASH memory in the MCU. Monitor mode entry can be
achieved without use of the higher test voltage, V
blank, thus reducing the hardware requirements for in-circuit programming.
7.2 Features
Features of the monitor ROM include the following:
7.3 Functional Description
The monitor ROM receives and executes commands from a host computer.
circuit used to enter monitor mode and communicate with a host computer via a standard RS-232
interface.
Simple monitor commands can access any memory address. In monitor mode, the MCU can execute
host-computer code in RAM while most MCU pins retain normal operating mode functions. All
communication between the host computer and the MCU is through the PTB0 pin. A level-shifting and
multiplexing interface is required between PTB0 and the host computer. PTB0 is used in a wired-OR
configuration and requires a pull-up resistor.
1. No security feature is absolutely secure. However, Motorola’s strategy is to make reading or copying the FLASH difficult for
Freescale Semiconductor
unauthorized users.
Normal user-mode pin functionality
One pin dedicated to serial communication between monitor ROM and host computer
Standard mark/space non-return-to-zero (NRZ) communication with host computer
Execution of code in RAM or FLASH
FLASH memory security feature
FLASH memory programming interface
959 bytes monitor ROM code size
Monitor mode entry without high voltage, V
$FF)
Standard monitor mode entry if high voltage, V
Resident routines for FLASH programming and EEPROM emulation
MC68HC908JL8/JK8 • MC68HC08JL8/JK8 • MC68HC908KL8 Data Sheet, Rev. 3.1
(1)
TST
TST
, as long as vector addresses $FFFE and $FFFF are
, if reset vector is blank ($FFFE and $FFFF contain
TST
, is applied to IRQ
Figure 7-1
shows a example
85

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