MC68HC908JK8CP Freescale Semiconductor, MC68HC908JK8CP Datasheet - Page 150

• Manufacturer Part Number: MC68HC908JK8CP
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC908JK8CP

• Cpu Family: HC08
• Device Core Size: 8b
• Frequency (max): 8MHz
• Interface Type: SCI
• Program Memory Type: Flash
• Program Memory Size: 8KB
• Total Internal Ram Size: 256Byte
• # I/os (max): 15
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 13-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Through Hole
• Pin Count: 20
• Package Type: PDIP
• Lead Free Status / Rohs Status: Not Compliant

Analog-to-Digital Converter (ADC)
10.7.2 ADC Data Register
One 8-bit result register is provided. This register is updated each time an ADC conversion completes.
10.7.3 ADC Input Clock Register
This register selects the clock frequency for the ADC.
ADIV[2:0] — ADC Clock Prescaler Bits
150
ADIV[2:0] form a 3-bit field which selects the divide ratio used by the ADC to generate the internal ADC
clock.
approximately 1MHz.
Table 10-2
Address:
Address:
X = don’t care
Reset:
Reset:
Read:
Read:
Write:
Write:
ADIV2
MC68HC908JL8/JK8 • MC68HC08JL8/JK8 • MC68HC908KL8 Data Sheet, Rev. 3.1
0
0
0
0
1
shows the available clock configurations. The ADC clock should be set to
$003D
$003E
ADIV2
Bit 7
AD7
Bit 7
0
Figure 10-5. ADC Input Clock Register (ADICLK)
ADIV1
Figure 10-4. ADC Data Register (ADR)
ADIV1
X
0
0
1
1
AD6
Table 10-2. ADC Clock Divide Ratio
6
6
0
= Unimplemented
= Unimplemented
ADIV0
AD5
5
5
0
ADIV0
X
0
1
0
1
Indeterminate after reset
AD4
4
4
0
0
AD3
3
3
0
0
Bus Clock ÷ 1
Bus Clock ÷ 2
Bus Clock ÷ 4
Bus Clock ÷ 8
Bus Clock ÷ 16
ADC Clock Rate
AD2
2
2
0
0
AD1
1
1
0
0
Freescale Semiconductor
Bit 0
AD0
Bit 0
0
0