MC68HC908JK8CP Freescale Semiconductor, MC68HC908JK8CP Datasheet - Page 164

• Manufacturer Part Number: MC68HC908JK8CP
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC908JK8CP

• Cpu Family: HC08
• Device Core Size: 8b
• Frequency (max): 8MHz
• Interface Type: SCI
• Program Memory Type: Flash
• Program Memory Size: 8KB
• Total Internal Ram Size: 256Byte
• # I/os (max): 15
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 13-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Through Hole
• Pin Count: 20
• Package Type: PDIP
• Lead Free Status / Rohs Status: Not Compliant

External Interrupt (IRQ)
The vector fetch or software clear may occur before or after the interrupt pin returns to logic one. As long
as the pin is low, the interrupt request remains pending. A reset will clear the latch and the MODE control
bit, thereby clearing the interrupt even if the pin stays low.
When set, the IMASK bit in the INTSCR mask all external interrupt requests. A latched interrupt request
is not presented to the interrupt priority logic unless the IMASK bit is clear.
12.3.1 IRQ Pin
A logic zero on the IRQ pin can latch an interrupt request into the IRQ latch. A vector fetch, software clear,
or reset clears the IRQ latch.
If the MODE bit is set, the IRQ pin is both falling-edge-sensitive and low-level-sensitive. With MODE set,
both of the following actions must occur to clear IRQ:
164
Addr.
$001D
IRQPUD
IRQ
IRQ Status and Control
Register Name
The interrupt mask (I) in the condition code register (CCR) masks all
interrupt requests, including external interrupt requests. (See
Control.)
DECODER
VECTOR
FETCH
MC68HC908JL8/JK8 • MC68HC08JL8/JK8 • MC68HC908KL8 Data Sheet, Rev. 3.1
RESET
ACK
V
DD
INTERNAL
PULLUP
DEVICE
(INTSCR)
Register
Reset:
Read:
Write:
Figure 12-1. IRQ Module Block Diagram
Figure 12-2. IRQ I/O Register Summary
V
MODE
DD
Bit 7
D
0
0
CK
CLR
Q
= Unimplemented
6
0
0
NOTE
5
0
0
IMASK
SYNCHRONIZER
4
0
0
VOLTAGE
DETECT
HIGH
IRQF
3
0
5.5 Exception
ACK
2
0
0
IRQF
Freescale Semiconductor
IMASK
1
0
TO CPU FOR
BIL/BIH
INSTRUCTIONS
IRQ
INTERRUPT
REQUEST
TO MODE
SELECT
LOGIC
MODE
Bit 0
0