XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 101

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XRT94L33IB-L

Manufacturer Part Number
XRT94L33IB-L
Description
IC MAPPER DS3/E3/STS-1 504TBGA
Manufacturer
Exar Corporation
Datasheets

Specifications of XRT94L33IB-L

Applications
Network Switches
Interface
Bus
Voltage - Supply
3.14 V ~ 3.47 V
Package / Case
504-LBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XRT94L33IB-L
Manufacturer:
Exar Corporation
Quantity:
10 000
xr
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
AD10
AC10
AC11
AD11
AE10
AG6
AE8
AE9
AF6
AF7
AF9
RxPOHFrame_0
RxPOHFrame_1
RxPOHFrame_2
RxPOHValid_0
RxPOHValid_1
RxPOHValid_2
RxPOHClk_0
RxPOHClk_1
RxPOHClk_2
LOF
SEF
O
O
O
O
O
CMOS
CMOS
CMOS
CMOS
CMOS
Receive SONET POH Processor Block – Path Overhead
Output Port – Clock Output Signal:
These output pins, along with “RxPOH_n”, “RxPOHFrame_n” and
“RxPOHValid_n” function as the “Receive SONET POH Processor
block – POH Output Port.
These output pins function as the “Clock Output” signals for the
“Receive SONET POH Processor block – POH Output Port. The
“RxPOH_n”, “RxPOHFrame_n” and “RxPOHValid_n” output pins
are updated upon the falling edge of this clock signal.
consequence, the external circuitry should sample these signals
upon the rising edge of this clock signal.
Receive SONET POH Processor Block – Path Overhead
Output Port – Frame Boundary Indicator:
These output pins, along with the “RxPOH_n”, RxPOHClk_n” and
“RxPOHValid_n” output pins function as the “Receive SONET POH
Processor Block – Path Overhead Output Port.
These output pins will pulse “high” coincident with the very first
POH byte (J1), of a given STS-1 frame, is being output via the
corresponding “RxPOH_n” output pin.
Receive SONET POH Processor Block – Path Overhead
Output Port – Valid POH Data Indicator:
These output pins, along with “RxPOH_n”, “RxPOHClk_n” and
“RxPOHFrame_n” function as the “Receive SONET POH
Processor block – Path Overhead Output port.
These output pins will toggle “high” coincident with when valid POH
data is being output via the “RxPOH_n” output pins. This output is
updated upon the falling edge of RxPOHClk_n. Hence, external
circuitry should sample these signals upon rising edge of
“RxPOHClk_n”.
Receive STS-3 LOF (Loss of Frame) Indicator:
This output pin indicates whether or not the Receive STS-3 TOH
Processor block (within the device) is currently declaring the LOF
defect condition as described below.
LOW – Indicates that the Receive STS-3 TOH Processor block is
NOT currently declaring the LOF defect condition.
HIGH – Indicates that the Receive STS-3 TOH Processor block is
currently declaring the LOF defect condition.
Receive STS-3 SEF (Severed Errored Frame) Indicator:
This output pin indicates whether or not the Receive STS-3 TOH
Processor block (within the device) is currently declaring the SEF
defect condition as described below.
LOW – Indicates that the Receive STS-3 TOH Processor block is
NOT currently declaring the SEF defect condition.
HIGH – Indicates that the Receive STS-3 TOH Processor block is
currently declaring the SEF defect condition.
101
XRT94L33
Rev.1.2.0.
As a

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