XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 457

• Manufacturer Part Number: XRT94L33IB-L
• Description: IC MAPPER DS3/E3/STS-1 504TBGA
• Manufacturer: Exar Corporation

Specifications of XRT94L33IB-L

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 3.14 V ~ 3.47 V
• Package / Case: 504-LBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

xr
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
Notes:
During this step, the user can write in any value, between 0x00 and 0x1E provided this “Multi-PHY Address” is unique
Use of the value “0x1F” is NOT permitted.
These steps do not assign a Transmit UTOPIA Address value to STS-3c Channel 3. This assignment must be performed
Once the user has executed STEPS 4a and 4b then STS-3c Channel 3 (within the XRT94L33) has been
assigned the “Receive UTOPIA Address” of [d4, d3, d2, d1, d0].
2.3.5.1.2.7
In this section, the various Multi-PHY Operations (e.g., polling and selection for writing) will be first discussed
for a “Conceptual Multi-PHY” System, and then later, specifically for the XRT94L33. When the XRT94L33 is
operating in the “Multi-PHY” mode, then the Receive UTOPIA Interface block will automatically be configured
to support “polling”. “Polling” allows an ATM Layer processor (which is interfaced to several UNI devices) to
determine which UNIs are capable of receiving and handling additional ATM cell data, at any given time. The
manner in which the ATM Layer processor “polls” its UNI devices, (per the “Conceptual Multi-PHY” system)
follows.
Figure 117 An Illustration of the “Conceptual Multi-PHY System consisting of UNI Devices #1 and #2
among all of the Receive UTOPIA Interface Addresses within a “Multi-PHY” system.
separately per the “Transmit UTOPIA Address Assignment” instructions presented in Section _.
TxAddr = 0x00 RxAddr = 0x01
TxAddr = 0x02 RxAddr = 0x03
UNI # 1
UNI # 2
ATM Layer Processor “polling” of the UNIs, in the Multi-PHY Mode
TxUData[15:0]
RxUData[15:0]
TxUAddr[4:0]
RxUAddr[4:0]
TxUData[15:0]
TxUAddr[4:0]
RxUData[15:0]
RxUAddr[4:0]
TxUPrty
TxUEnb*
TxUSoC
TxUClav
RxUPrty
RxUEnb*
RxUSoC
RxUClav
TxUEnb*
TxUSoC
TxUClav
RxUEnb*
RxUClav
TxUPrty
RxUPrty
RxUSoC
457
RxData[15:0]
Rx_SoC_In
RxClav_In
TxData[15:0]
Tx_Parity
Tx_Ut_WR*
Tx_SoC_out
TxClav_In
Rx_Parity
Rx_Ut_Rd*
Ut_Addr[4:0]
ATM Layer Processor
XRT94L33
Rev.1.2.0.