XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 25

• Manufacturer Part Number: XRT94L33IB-L
• Description: IC MAPPER DS3/E3/STS-1 504TBGA
• Manufacturer: Exar Corporation

Specifications of XRT94L33IB-L

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 3.14 V ~ 3.47 V
• Package / Case: 504-LBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

xr
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
D7
B4
TxSDCCEnable
TxLDCCEnable
O
O
CMOS
CMOS
Transmit – Line DCC Input Port – Enable Output pin:
This output pin, along with the “TxTOHClk” output pin and the
“TxLDCC” input pin permit the user to insert their value for the
D4, D5, D6, D7, D8, D9, D10, D11 and D12 bytes into the
Transmit STS-3 TOH Processor Block. The Transmit STS-3
TOH Processor block will accept this data and will insert into
the D4, D5, D6, D7, D8, D9, D10, D11 and D12 byte-fields,
within the “outbound” STS-3 data-stream.
The Line DCC HDLC Controller circuitry (which is connected
to the “TxTOHClk”, the “TxSDCC” and this output pin, is
suppose to do the following.
It should continuously monitor the state of this output pin.
Whenever this output pin pulses “HIGH”, then the Line DCC
HDLC Controller circuitry should place the next Line DCC bit
(to be inserted into the “Transmit STS-3 TOH Processor”
block) onto the “TxLDCC” input pin, upon the rising edge of
“TxTOHClk”.
Any data that is placed on the “TxLDCC” input pin, will be
sampled upon the falling edge of “TxOHClk”.
Transmit – Section DCC Input Port – Enable Output pin:
This output pin, along with the “TxTOHClk” output pin and the
“TxSDCC” input pin permit the user to insert their value for the
D1, D2 and D3 bytes, into the Transmit STS-3 TOH Processor
Block. The Transmit STS-3 TOH Processor block will accept
this data and will insert into the D1, D2 and D3 byte-fields,
within the “outbound” STS-3 data-stream.
The Section DCC HDLC Controller circuitry (which is
connected to the “TxTOHClk”, the “TxSDCC” and this output
pin, is suppose to do the following.
It should continuously monitor the state of this output pin.
Whenever this output pin pulses “HIGH”, then the Section
DCC HDLC Controller circuitry should place the next Section
DCC bit (to be inserted into the “Transmit STS-3 TOH
Processor” block) onto the “TxSDCC” input pin, upon the rising
edge of “TxTOHClk”.
Any data that is placed on the “TxSDCC” input pin, will be
sampled upon the falling edge of “TxOHClk”.
25
XRT94L33
Rev.1.2.0.