XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 254

• Manufacturer Part Number: XRT94L33IB-L
• Description: IC MAPPER DS3/E3/STS-1 504TBGA
• Manufacturer: Exar Corporation

Specifications of XRT94L33IB-L

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 3.14 V ~ 3.47 V
• Package / Case: 504-LBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

XRT94L33
Rev.1.2.0.
• A “negative-stuff” will occur (e.g., a single payload byte will be inserted into the “H3 byte” position, within the
outbound STS-3c data-stream).
• The “D” bits, within the H1 and H2 bytes will be inverted (to denote a “Decrementing” pointer-adjustment
event).
• The contents of the H1 and H2 bytes will be decremented by “1” and will be used as the new pointer from
this point on.
Note:
2.2.7.3.11.3
The Transmit STS-3c POH Processor block permits the user to force a single NDF event into the outbound
STS-3c data-stream. This can be accomplished by executing the following steps.
STEP 1- Write the new “desired” pointer value into Bits 1 and 0 (H1 Pointer Value) within the
“Transmit STS-3c Path – Transmit Arbitrary H1 Pointer Register; and Bits 7 through 0 (H2 Pointer
Value) within the “Transmit STS-3c Path – Transmit Arbitrary H2 Pointer Register.
The bit-format of these two registers (with the relevant bit-fields shaded) is presented below.
Transmit STS-3c Path – Transmit Arbitrary H1 Byte Pointer Register (Address = 0x19BF)
Transmit STS-3c Path – Transmit Arbitrary H2 Byte Pointer Register (Address = 0x19C3)
STEP 2 – Induce a “0 to 1 transition” in Bit 0 (Insert Single NDF Event) within the “Transmit STS-3c
Path – Transmit Path Control” Register; as depicted below.
Transmit STS-3c Path – Transmit Path Control Register (Address = 0x19B7)
Once the user induces this “0 to 1 transition” in Bit 0, then the following events will occur.
• The “N” bits, in the H1 byte (within the very next outbound STS-3c frame) will be set to the value “1001”.
B
B
B
R/W
R/W
R/O
IT
IT
IT
0
0
0
7
7
7
The contents of Bit 3 (Insert Negative Stuff) will be automatically cleared after the user has written a “1” into this
bit-field. Hence, there is no need for the user to go back and write a “0” into this bit-field.
Unused
Forcing a Single NDF Event via Software
B
B
B
R/W
R/W
R/O
IT
IT
IT
0
0
0
6
6
6
NDF Bits
Pointer
Force
B
B
B
R/W
R/W
R/W
IT
IT
IT
0
0
0
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
5
5
5
Check Stuff
H2 Pointer Value[7:0]
B
B
B
R/W
R/W
R/W
IT
IT
IT
0
0
0
4
4
4
254
Negative
Insert
B
B
B
Stuff
R/W
R/W
W
IT
IT
IT
0
0
0
3
3
3
SS Bits
Positive
Insert
B
B
B
Stuff
R/W
R/W
W
IT
IT
IT
0
0
0
2
2
2
NDF Events
Continuous
Insert
B
B
B
R/W
R/W
R/W
IT
H1 Pointer Value
IT
IT
0
0
0
1
1
1
xr
Single NDF
Event
Insert
B
B
B
R/W
R/W
0->1
R/W
IT
IT
IT
0
0
0
0
0