XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 269
XRT94L33IB-L
Manufacturer Part Number
XRT94L33IB-L
Description
IC MAPPER DS3/E3/STS-1 504TBGA
Manufacturer
Exar Corporation
Specifications of XRT94L33IB-L
Applications
Network Switches
Interface
Bus
Voltage - Supply
3.14 V ~ 3.47 V
Package / Case
504-LBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XRT94L33IB-L
Manufacturer:
Exar Corporation
Quantity:
10 000
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3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
2.2.8.3.4
The Transmit SONET POH Processor block permits the user to transmit Path Trace Messages to the remote
PTE via the J1 byte. The Transmit SONET POH Processor block permits the user to accomplish this by
either of the following options.
• Automatically set the J1 byte (within each outbound STS-1 SPE) to “0x00”
• Set and control the outbound J1 byte via on-chip register
• Set and control the outbound J1 byte via external input pin
• Use the “Transmit Path Trace Message” buffer
The details and instructions for using either of these features are presented below.
2.2.8.3.4.1
The XRT94L33 permits the user to configure each of the four (4) Transmit SONET POH Processor blocks to
automatically set the contents of the J1 byte (within each outbound STS-1 SPE) to “0x00”.
The user can accomplish this by writing the value “[0, 0]” into Bits 1 and 0 (J1 Type[1:0]) within the
appropriate “Transmit SONET Path – Transmit J1 Control” Register; as depicted below.
Transmit SONET Path – Transmit J1 Control” Register (Address = 0xN9BB)
Once the user executes this step, then the corresponding Transmit SONET POH Processor block(s) will be
configured to automatically set the J1 byte (within each outbound STS-1 SPE) to the value “0x00”.
2.2.8.3.4.2
The XRT94L33 contains a total of four (4) “Transmit Path Trace Message Buffers (one for each “Transmit
SONET POH Processor Block, within the device).
The address location of the “Transmit Path Trace Message” buffer, for each of the four Transmit SONET POH
Processor blocks is presented below.
Table 15: Address Locations of the Transmit Path Trace Message Buffers within the XRT94L33
If the user wishes to use the “Path Trace Message” buffer as the means to load and transmit the “Path Trace
Message” to the remote PTE, then the following steps must be executed.
B
R/O
T
IT
0
RANSMIT
7
SONET POH P
TRANSMISSION OF PATH TRACE MESSAGES VIA THE J1 BYTE
Automatically setting the J1 byte (within each outbound STS-1 SPE) to “0x00”
Using the “Transmit Path Trace Message” Buffer
B
R/O
IT
0
C
6
HANNEL
0
1
2
3
Unused
ROCESSOR
B
R/O
IT
0
5
B
LOCK
-
B
R/O
IT
0
4
A
269
DDRESS
J1 Message Length[1:0]
B
R/W
L
IT
X
OCATION OF THE
3
0x1D00 – 0x1D3F
0x2D00 – 0x2D3F
0x3D00 – 0x3D3F
0x4D00 – 0x4D3F
M
ESSAGE
B
R/W
B
IT
X
T
UFFER
2
RANSMIT
P
ATH
B
R/W
IT
0
T
1
RACE
J1 Type[1:0]
XRT94L33
Rev.1.2.0.
B
R/W
IT
0
0
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