XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 155

• Manufacturer Part Number: XRT94L33IB-L
• Description: IC MAPPER DS3/E3/STS-1 504TBGA
• Manufacturer: Exar Corporation

Specifications of XRT94L33IB-L

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 3.14 V ~ 3.47 V
• Package / Case: 504-LBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
Table 11 The Relationship between the contents of “Transmit UTOPIA Data Bus Width[1:0] within the
Transmit UTOPIA Control Register and the operating width of the Transmit UTOPIA Data bus
2.2.1.3.2
The XRT94L33 permits the user to select the number of octets per cell that the Transmit UTOPIA Interface
block will process, following each assertion of the TxUSoC input pin. Specifically, the user has the following
cell size options.
• If the UTOPIA Data Bus width is set to 8 bits then the user can choose:
• If the UTOPIA Data Bus width is set to 16 bits then the user can choose:
The user makes his/her selection by writing the appropriate data into bits 1 and 0 (Cell_Size_Sel[1:0]) within
the Transmit UTOPIA Control Register, as depicted below.
Transmit UTOPIA Control Register – Byte 0, Address = 0x0583
The following table presents the relationship between the value of these bits and the number of octets/cell
that the Transmit UTOPIA Interface block will process.
T
UTOPIA
RANSMIT
Level
B
R/W
IT
1
B
7
US
52 bytes (with no HEC byte in the cell), or
53 bytes (with either a dummy or actual HEC byte in the cell)
52 bytes (with no HEC byte in the cell), or
54 bytes (with either a dummy or actual HEC byte, and a stuff byte in the cell)
W
UTOPIA D
00
01
10
11
IDTH
Selecting the Cell Size (Number of Octets per Cell)
[1:0]
Multi-PHY
Mode
B
R/W
IT
0
ATA
6
Back Polling
Back-to-
Enable
B
R/W
IT
0
5
Access
Status
Direct
W
B
R/W
IT
IDTH OF
0
4
Not valid (do not use)
155
T
RANSMIT
In-active:
16 bits
B
Data Bus Width[1:0]
R/W
8 bits
Transmit UTOPIA
IT
1
UTOPIA D
3
ATA
B
R/W
IT
1
B
2
US
B
R/W
Cell_Size_Sel[1:0]
IT
X
1
XRT94L33
Rev.1.2.0.
B
R/W
IT
X
0