XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 182

• Manufacturer Part Number: XRT94L33IB-L
• Description: IC MAPPER DS3/E3/STS-1 504TBGA
• Manufacturer: Exar Corporation

Specifications of XRT94L33IB-L

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 3.14 V ~ 3.47 V
• Package / Case: 504-LBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

XRT94L33
Rev.1.2.0.
Bit 1 – Discard Cell Enable
This bit-field permits the user to configures the “Transmit User Cell” filter (within the Transmit ATM Cell
Processor block) either discard or not discard a given cell that complies with the “user-defined” filtering
requirements. Cells that are discarded will not be routed to the “Transmit STS-3c POH Processor” block.
Cells that are NOT discarded will proceed on through the remainder of the Transmit ATM Cell Processor
block circuitry, for further processing.
Setting this bit-field to “1” configures the Transmit User Cell Filter to discard all cells that comply with the
“user-cell” filter requirements.
Conversely, setting this bit-field to “0” configures the Transmit User Cell Filter to NOT discard the cells that
comply with the “user-cell” filter requirements.
2.2.6.3
The Sense of a given Transmit User Cell Filter is defined by the state of Bit 0 (User Cell Filter Sense) within
the “Transmit ATM Filter Control – Byte 0” Register; as described below.
Bit 0 - User Cell Filter Sense
Transmit ATM Filter # 0 , # 1, # 2, # 3 Control – Byte 0 (Address = 0xNF43, 0xNF53, 0xNF63, 0xNF73)
This bit-field controls the “Filter Mode”. If the user sets this bit-field to “1” then the “Transmit User-Cell” Filter
will act, per the settings within Bits 2 (Copy Cell Enable) and 1 (Discard Cell Enable) on cells with header byte
patterns MATCHING the “user-cell” filtering criteria. Conversely, setting this bit-field to “0” configures the
“Transmit User-Cell” Filter to act, per the settings within Bits 2 (Copy Cell Enable) and 1 (Discard Cell Enable)
on cells with header byte patterns NOT MATCHING the “user-cell” filtering criteria.
2.2.6.4
As described above, each of the four Transmit User Cell Filters (within the Transmit ATM Cell Processor
block) can be configured to perform a variety of actions (e.g., copy cells, discard cells, etc); based upon
whether the Header Byte Patterns of User Cells MATCH; or DO NOT MATCH a particular “User-Defined”
Filter criteria.
The “User-Defined” Filter criteria (for each of the four Transmit User Cell Filter blocks, within the Transmit
ATM Cell Processor block) are ultimately defined by the values residing within a total of eight (8) registers.
Four of these registers are referred to as “User Cell Filter – Pattern” Registers; and the remaining four
registers are referred to as “User Cell Filter – Check” Registers. Each of these register types are defined
below.
B
R/O
IT
0
7
D
S
PECIFYING THE
EFINING THE
B
R/O
IT
0
6
Unused
U
SER
T
RANSMIT
C
B
R/O
IT
ELL
0
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
5
F
U
ILTER
SER
C
S
B
ELL
ENSE
R/O
IT
0
4
F
ILTERING
182
Filter Enable
User Cell
B
C
R/W
IT
1
RITERIA
3
Copy Cell
Enable
B
R/W
IT
X
2
Discard
Enable
B
R/W
Cell
IT
X
1
xr
Filter Sense
User Cell
B
R/W
IT
X
0