XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 290

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XRT94L33IB-L

Manufacturer Part Number
XRT94L33IB-L
Description
IC MAPPER DS3/E3/STS-1 504TBGA
Manufacturer
Exar Corporation
Datasheets

Specifications of XRT94L33IB-L

Applications
Network Switches
Interface
Bus
Voltage - Supply
3.14 V ~ 3.47 V
Package / Case
504-LBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XRT94L33IB-L
Manufacturer:
Exar Corporation
Quantity:
10 000
XRT94L33
Rev.1.2.0.
The user can configure the Transmit SONET POH Processor block to accomplish this by performing the
following steps.
STEP 1 – Write the value “0” into Bit 0 (Z5 Insertion Type) within the “Transmit SONET Path – SONET
Control Register – Byte 1”, as depicted below.
Transmit SONET Path – SONET Control Register – Byte 1 (Address = 0xN982)
This step configures the Transmit SONET POH Processor block to read out the contents of the “Transmit
SONET Path – Transmit Z5 Byte Value” register; and load this value into the Z5 byte position within each
“outbound” STS-1 SPE.
STEP 2 – Write the desired byte value (for the outbound Z5 byte) into the “Transmit SONET Path –
Transmit Z5 Byte Value” register.
The bit-format of this register is presented below.
Transmit SONET Path – Transmit Z5 Byte Value Register (Address = 0xN9B3)
2.2.8.3.10.2
The Transmit SONET POH Processor block permits the user to specify the contents of the Z5 byte, within the
“outbound” STS-1 SPE, via data applied to the “TxPOH_n” input pin.
The user can configure the Transmit SONET POH Processor block to accomplish this by performing the
following steps.
STEP 1 – Write the value “1” into Bit 0 (Z5 Byte Insertion Type) within the “Transmit SONET Path –
SONET Control Register – Byte 1”, as depicted below.
Transmit SONET Path – SONET Control Register – Byte 1 (Address = 0xN982)
This step configures the Transmit SONET POH Processor block to use the “TxPOH_n” input port as the
source for the Z5 byte, within each “outbound” STS-1 SPE.
Processor block will accept the value, corresponding to the Z5 byte (via the “TxPOH_n” input port) and it will
write this data into the Z5 byte position, within the “outbound” STS-1 SPE.
B
B
B
R/W
R/O
R/O
IT
IT
IT
0
0
0
7
7
7
Setting and Controlling the Outbound Z5 Byte via the “TxPOH_n Input Port”
B
B
B
R/W
R/O
R/O
IT
IT
IT
0
0
0
6
6
6
Unused
Unused
B
B
B
R/W
R/O
R/O
IT
IT
IT
0
0
0
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
5
5
5
Transmit_Z5_Byte_Value[7:0]
B
B
B
R/W
R/O
R/O
IT
IT
IT
0
0
0
4
4
4
290
Z5 Insertion
Z5 Insertion
B
Type
B
B
Type
R/W
R/W
R/W
IT
IT
IT
0
0
1
3
3
3
In this mode, the Transmit SONET POH
Z4 Insertion
Z4 Insertion
B
Type
B
B
Type
R/W
R/W
R/W
IT
IT
IT
0
0
0
2
2
2
Z3 Insertion
Z3 Insertion
B
Type
B
B
Type
R/W
R/W
R/W
IT
IT
IT
0
0
0
1
1
1
xr
H4 Insertion
H4 Insertion
Type
Type
B
B
B
R/W
R/W
R/W
IT
IT
IT
X
0
0
0
0
0

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