XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 262
XRT94L33IB-L
Manufacturer Part Number
XRT94L33IB-L
Description
IC MAPPER DS3/E3/STS-1 504TBGA
Manufacturer
Exar Corporation
Specifications of XRT94L33IB-L
Applications
Network Switches
Interface
Bus
Voltage - Supply
3.14 V ~ 3.47 V
Package / Case
504-LBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XRT94L33IB-L
Manufacturer:
Exar Corporation
Quantity:
10 000
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XRT94L33
Rev.1.2.0.
STEP 2 – Set Bit 0 (Transmit RDI-P upon AIS-P) within the “Transmit SONET Path – RDI-P Control
Register – Byte 0”, as illustrated below.
Transmit SONET Path – RDI-P Control Register – Byte 0 (Address = 0xN9CB)
This step configures the Transmit SONET POH Processor block to automatically transmit the RDI-P indicator
(per the values written into Bits 3 through 1, within this register); anytime the corresponding “Receive SONET
POH Processor” block declares the “AIS-P” condition.
2.2.8.3.2.6
The user can configure the Transmit SONET POH Processor block to automatically transmit the RDI-P
indicator, in response to the corresponding Receive SONET POH Processor block declaring the TIM-P
condition, by executing the following steps.
STEP 1 – Write the appropriate value into Bits 7 through 5 (TIM-P RDI-P Code[2:0]) within the
“Transmit SONET Path – RDI-P Condition Register – Byte 1; as illustrated below.
Transmit SONET Path – RDI-P Control Register – Byte 1 (Address = 0xN9CA)
By writing this particular value into these bit-fields the user is specifying the value that the “Transmit SONET
POH Processor” block will set the RDI-P bit-fields (within the G1 byte of the outbound STS-1 frame) to
whenever the corresponding Receive SONET POH Processor block declares the TIM-P condition.
STEP 2 – Set Bit 4 (Transmit RDI-P upon TIM-P) within the “Transmit SONET Path – RDI-P Control
Register – Byte 1”; to “1” as illustrated below.
Transmit SONET Path – RDI-P Control Register – Byte 1 (Address = 0xN9CA)
This step configures the Transmit SONET POH Processor block to transmit the RDI-P indicator (per the
values written into Bits 3 through 1, within this register); anytime the corresponding “Receive SONET POH
Processor” block declares the “TIM-P” condition.
B
B
B
R/W
R/W
R/W
IT
IT
IT
X
X
X
7
7
7
LOP-P RDI-P Code[2:0]
TIM-P RDI-P Code[2:0]
TIM-P RDI-P Code[2:0]
Configuring the Transmit SONET POH Processor block to automatically transmit RDI-
P, in response to declaration of the TIM-P Condition
B
B
B
R/W
R/W
R/W
IT
IT
IT
X
X
X
6
6
6
B
B
B
R/W
R/W
R/W
IT
X
IT
X
IT
X
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
5
5
5
RDI-P upon
RDI-P upon
RDI-P upon
Transmit
Transmit
Transmit
LOP-P
TIM-P
TIM-P
B
B
B
R/W
R/W
R/W
IT
IT
IT
1
0
1
4
4
4
262
B
B
B
R/W
R/W
R/W
IT
X
IT
X
IT
X
3
3
3
UNEQ-P RDI-P Code[2:0]
UNEQ-P RDI-P Code[2:0]
AIS-P RDI-P Code[2:0]
B
B
B
R/W
R/W
R/W
IT
IT
IT
X
X
X
2
2
2
B
B
B
R/W
R/W
R/W
IT
X
IT
X
IT
X
1
1
1
xr
RDI-P upon
RDI-P upon
RDI-P upon
Transmit
Transmit
UNEQ-P
Transmit
UNEQ-P
AIS-P
B
B
B
R/W
R/W
R/W
IT
IT
IT
X
X
1
0
0
0
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