XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 421

• Manufacturer Part Number: XRT94L33IB-L
• Description: IC MAPPER DS3/E3/STS-1 504TBGA
• Manufacturer: Exar Corporation

Specifications of XRT94L33IB-L

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 3.14 V ~ 3.47 V
• Package / Case: 504-LBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

xr
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
Receive ATM Filter # 0, # 1, # 2, # 3 Check – Header Byte 1 (Address = 0xN748, 0xN758, 0xN768,
0xN778)
Receive ATM Filter # 0, # 1, # 2, # 3 Check – Header Byte 2 (Address = 0xN749, 0xN759, 0xN769,
0xN779)
Receive ATM Filter # 0, # 1, # 2, # 3 Check – Header Byte 3 (Address = 0xN74A, 0xN75A, 0xN76A,
0xN77A)
Receive ATM Filter # 0, # 1, # 2, # 3 Check – Header Byte 4 (Address = 0xN74B, 0xN75B, 0xN76B,
0xN77B)
Note:
COUNTING FILTERED CELLS
The user can keep account of the number of User Cells that have been filtered out by the Receive User Cell
Filter by periodically reading out the contents of the “Receive ATM Filter Count” Registers. Each time a user
cell is filtered (e.g., either discarded or copied) by the “Receive User Cell” Filter, then this counter will be
incremented by the value of “1”. This counter will increment until it reaches the value of 0xFFFFFFFF. At this
time, the counter will “saturate” and will not increment any further until read. These registers are 32 bits, in
width and are “RESET-upon-READ.
presented below.
Receive ATM Filter # 0, # 1, # 2, # 3 – Filtered Cell Counter – Byte 3 (Address = 0xN74C, 0xN75C,
0xN76C, 0xN77C)
B
B
B
B
B
R/W
R/W
R/W
R/W
IT
IT
IT
IT
IT
0
0
0
0
7
7
7
7
7
Each of the four User Cell Filters (within the Receive ATM Cell Processor block) contains their own set of “User
Cell Filter – Check” registers.
B
B
B
B
B
R/W
R/W
R/W
R/W
IT
IT
IT
IT
IT
0
0
0
0
6
6
6
6
6
B
B
B
B
B
R/W
R/W
R/W
R/W
IT
IT
IT
IT
IT
0
0
0
0
5
5
5
5
5
User Cell Filter Check – Header Byte 1[7:0]
User Cell Filter Check – Header Byte 2[7:0]
User Cell Filter Check – Header Byte 3[7:0]
User Cell Filter Check – Header Byte 4[7:0]
The bit-format for these registers (for each of the four filters) is
Filtered Cell Count[31:24]
B
B
B
B
B
R/W
R/W
R/W
R/W
IT
IT
IT
IT
IT
0
0
0
0
4
4
4
4
4
421
B
B
B
B
B
R/W
R/W
R/W
R/W
IT
IT
IT
IT
IT
0
0
0
0
3
3
3
3
3
B
B
B
B
B
R/W
R/W
R/W
R/W
IT
IT
IT
IT
IT
0
0
0
0
2
2
2
2
2
B
B
B
B
B
R/W
R/W
R/W
R/W
IT
IT
IT
IT
IT
0
0
0
0
1
1
1
1
1
XRT94L33
Rev.1.2.0.
B
B
B
B
B
R/W
R/W
R/W
R/W
IT
IT
IT
IT
IT
0
0
0
0
0
0
0
0
0