XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 225

• Manufacturer Part Number: XRT94L33IB-L
• Description: IC MAPPER DS3/E3/STS-1 504TBGA
• Manufacturer: Exar Corporation

Specifications of XRT94L33IB-L

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 3.14 V ~ 3.47 V
• Package / Case: 504-LBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
2.2.7.3.2.9
The user can configure the Transmit STS-3c POH Processor block to transmit the RDI-P (per external input
port) by executing the following steps.
STEP 1 – Write the value “[1, 0]” into Bits 3 and 4 (RDI-P Insertion Type[1:0]) within the “Transmit
STS-3c Path – SONET Control Register – Byte 0”, as depicted below.
Transmit STS-3c Path – SONET Control Register – Byte 0 (Address = 0x1983)
This step configures the “Transmit STS-3c POH Processor” block to set the value of the RDI-P bit-fields
(within the outbound STS-3c SPE) based upon the data that it receives via the “TxPOH_n” input port. In this
mode, the Transmit STS-3c POH Processor block will accept the value, corresponding to the RDI-P bit-fields
(via the “TxPOH_n Input Port”) and it will write this data into the “outbound” STS-3c SPE data-stream.
STEP 2 – Begin providing the values of the “outbound” RDI-P bit-fields to the “TxPOH_n” input port.
The procedure for applying the RDI-P bit-values to the “TxPOH_n” input port is presented below.
Using the “TxPOH” Input Port to insert the RDI-P bit values into the outbound STS-3c SPE data-
stream
If the user intends to externally insert the RDI-P bits into the outbound STS-3c SPE, via the “TxPOH_n” input
port, then they must design some external circuitry (which can be realized in an ASIC, FPGA or CPLD
solution) to do to the following.
• Continuously sample the “TxPOHEnable_n” and the “TxPOHFrame_n” output pins upon the rising edge of
the “TxPOHClk_n” output clock signal.
A simple illustration of this “external circuit” being interfaced to the “TxPOH Input Port” is presented below in
Figure 35.
F2 Insertion
B
Type
R/W
IT
0
7
REI-P Insertion Type[1:0]
Configuring the Transmit STS-3c POH Processor block to transmit the RDI-P Indicator,
via the “TxPOH_n” input port.
B
R/W
IT
0
6
B
R/W
IT
0
5
RDI-P Insertion Type[1:0]
B
R/W
IT
1
4
225
B
R/W
IT
0
3
Insertion
C2 Byte
B
Type
R/W
IT
0
2
Unused
B
R/O
IT
0
1
XRT94L33
Transmit
Enable
AIS-P
Rev.1.2.0.
B
R/W
IT
0
0