XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 414

• Manufacturer Part Number: XRT94L33IB-L
• Description: IC MAPPER DS3/E3/STS-1 504TBGA
• Manufacturer: Exar Corporation

Specifications of XRT94L33IB-L

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 3.14 V ~ 3.47 V
• Package / Case: 504-LBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

XRT94L33
Rev.1.2.0.
4. The HEC Byte Verification block will remain in the “Detection” Mode.
How Does the HEC Byte Verification Block transition back into the “Correction” State?
The HEC Byte Verification block will transition back into the “Correction” state once it has received “M”
consecutive cells with correct HEC byte values.
Threshold”. The user has the option to use the following values for “M”: 1, 2, 4 and 8. The user can
configure the Receive ATM Cell Processor block to use any of these values for “M” by writing the appropriate
value to the “Receive ATM Cell Processor Block – Receive ATM Control Register – Byte 0”, as depicted
below.
Receive ATM Cell Processor Block – Receive ATM Control Register – Byte 0 (Address = 0xN703)
Table 19 presents the relationship between the contents of the “HEC Byte Correction Threshold[1:0]” bit-fields
and the corresponding “Correction Threshold” configured.
Table 19 The Relationship between the contents of the “HEC Byte Correction Threshold[1:0]” Bit-
Fields the Corresponding “Correction Threshold” configured
2.3.4.2
After the “HEC Byte Verification” block, the very next block within the signal path (within the Receive ATM Cell
Processor block) is the “Cell Payload De-Scrambler” Block.
Figure 100 presents an illustration of the “Functional Block Diagram” of the Receive ATM Cell Processor
Block, with the “Cell Payload De-Scrambler” Block highlighted.
Figure 100 Illustration of the “Functional Block Diagram” of the Receive ATM Cell Processor Block
with the “Cell Payload De-Scrambler” Block highlighted
HEC Byte
Insert into
Enable
UDF1
RUR
B
R/W
IT
1
0
HEC B
7
YTE
C
ELL
HEC Status
into UDF2
C
Enable
ORRECTION
B
RUR
R/W
P
IT
1
0
AYLOAD
6
00
01
10
11
T
D
HRESHOLD
E
-S
HEC Byte Correction
B
RUR
R/W
CRAMBLER
IT
X
0
Threshold[1:0]
5
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
[1:0]
B
LOCK
B
R/W
RUR
IT
X
0
4
R
ESULTING
414
This value for “M” is also known as the “Correction
UTOPIA
Receive
Parity -
2 Consecutive Cells with No HEC Byte Errors
4 Consecutive Cells with No HEC Byte Errors
8 Consecutive Cells with No HEC Byte Errors
B
ODD
R/W
RUR
IT
1
“C
0
3
ORRECTION
1 Cell with No HEC Byte Errors
B
T
R/O
RUR
IT
0
HRESHOLD
0
C
2
ELLS
Unused
)
” C
ONFIGURED
B
R/O
RUR
IT
0
0
1
xr
(N
Descramble
UMBER OF
Enable
B
R/W
RUR
IT
0
0
0