XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 413
XRT94L33IB-L
Manufacturer Part Number
XRT94L33IB-L
Description
IC MAPPER DS3/E3/STS-1 504TBGA
Manufacturer
Exar Corporation
Specifications of XRT94L33IB-L
Applications
Network Switches
Interface
Bus
Voltage - Supply
3.14 V ~ 3.47 V
Package / Case
504-LBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XRT94L33IB-L
Manufacturer:
Exar Corporation
Quantity:
10 000
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3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
Receive ATM Cell Processor Block – Receive ATM Cells with Uncorrectable HEC Byte Error Count
Register – Byte 1 (Address = 0xN736)
Receive ATM Cell Processor Block – Receive ATM Cells with Uncorrectable HEC Byte Error Count
Register – Byte 0 (Address = 0xN737)
3. It will NOT correct the “Single-Bit” Error within this particular ATM cell. In fact, unless the Receive ATM
Cell Processor block is configured otherwise, it will discard this particular ATM cell.
Note:
Receive ATM Cell Processor Block – Receive Discarded ATM Cell Count – Byte 3 (Address = 0xN72C)
Receive ATM Cell Processor Block – Receive Discarded ATM Cell Count – Byte 2 (Address = 0xN72D)
Receive ATM Cell Processor Block – Receive Discarded ATM Cell Count – Byte 1 (Address = 0xN72E)
Receive ATM Cell Processor Block – Receive Discarded ATM Cell Count – Byte 0 (Address = 0xN72F)
B
B
B
B
B
B
RUR
RUR
RUR
RUR
RUR
IT
IT
IT
IT
IT
IT
0
0
0
0
0
7
7
7
7
7
7
Whenever the Receive ATM Cell Processor block discards ATM cells for “Uncorrectable HEC Byte” errors it will
also increment the “Receive ATM Cell Processor Block – Receive Discarded ATM Cell Count” Registers. These
registers are also 32-bit RESET-upon-READ registers that reside at Address Locations 0xN72C through
0xN72F. The bit format of these registers is presented below.
B
RUR
B
RUR
B
RUR
B
RUR
B
RUR
B
IT
IT
IT
IT
IT
IT
0
0
0
0
0
6
6
6
6
6
6
Received Cells with Uncorrectable HEC Byte Error Count[15:8]
Received Cells with Uncorrectable HEC Byte Error Count[7:0]
B
RUR
B
RUR
B
RUR
B
RUR
B
RUR
B
IT
IT
IT
IT
IT
IT
0
0
0
0
0
5
5
5
Receive – Discarded ATM Cell Count[31:24]
5
Receive – Discarded ATM Cell Count[23:16]
5
5
Receive – Discarded ATM Cell Count[15:8]
Receive – Discarded ATM Cell Count[7:0]
B
RUR
B
RUR
B
RUR
B
RUR
B
RUR
B
IT
IT
IT
IT
IT
IT
0
0
0
0
0
4
4
4
4
4
4
413
B
RUR
B
RUR
B
RUR
B
RUR
B
RUR
B
IT
IT
IT
IT
IT
IT
0
0
0
0
0
3
3
3
3
3
3
B
RUR
B
RUR
B
RUR
B
RUR
B
RUR
B
IT
IT
IT
IT
IT
IT
0
0
0
0
0
2
2
2
2
2
2
B
RUR
B
RUR
B
RUR
B
RUR
B
RUR
B
IT
IT
IT
IT
IT
IT
0
0
0
0
0
1
1
1
1
1
1
XRT94L33
Rev.1.2.0.
B
RUR
B
RUR
B
RUR
B
RUR
B
RUR
B
IT
IT
IT
IT
IT
IT
0
0
0
0
0
0
0
0
0
0
0
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