XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 102
XRT94L33IB-L
Manufacturer Part Number
XRT94L33IB-L
Description
IC MAPPER DS3/E3/STS-1 504TBGA
Manufacturer
Exar Corporation
Specifications of XRT94L33IB-L
Applications
Network Switches
Interface
Bus
Voltage - Supply
3.14 V ~ 3.47 V
Package / Case
504-LBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XRT94L33IB-L
Manufacturer:
Exar Corporation
Quantity:
10 000
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XRT94L33
Rev.1.2.0.
AC27
AG7
W25
GPIO_1
GPI0_0
LOS
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
I/O
I/O
O
CMOS
TTL/CMOS
TTL/CMOS
G
ENERAL
Receive STS-3 LOS (Loss of Signal) Defect Indicator:
This output pin indicates whether or not the Receive STS-3 TOH
Processor block (within the device) is currently declaring the LOS
defect condition as described below.
LOW – Indicates that the Receive STS-3 TOH Processor block is
NOT currently declaring the LOS defect condition.
HIGH – Indicates that the Receive STS-3 TOH Processor block is
currently declaring the LOS defect condition.
P
URPOSE
General Purpose Input/Output pin:
This input pin can be configured to function as either an input
or output pin by writing the appropriate value into Bit 0
(GPIO_DIR_0), within the “Operation General Purpose
Input/Output Direction Register – 0” (Address Location
0x014B).
If this pin is configured to be an input pin the state of this pin
can be monitored by reading the state of Bit 0 (GPIO_0) within
the “Operation General Purpose Input/Output Register – Byte
0” (Address Location = 0x0147).
If this pin is configured to be an output pin the state of this pin
can be controlled by writing the appropriate value into Bit 0
(GPIO_0) within the “Operation General Purpose Input/Output
Register – Byte 0” (Address Location = 0x0147).
General Purpose Input/Output pin
This input pin can be configured to function as either an input
or output pin by writing the appropriate value into Bit 1
(GPIO_DIR_1), within the “Operation General Purpose
Input/Output Direction Register – 0” (Address Location
0x014B).
If this pin is configured to be an input pin, then the state of this
pin can be monitored by reading the state of Bit 1 (GPIO_1)
within the “Operation General Purpose Input/Output Register –
Byte 0” (Address Location = 0x0147).
If this pin is configured to be an output pin, then the state of
this pin can be controlled by writing the appropriate value into
Bit 1 (GPIO_1) within the “Operation General Purpose
Input/Output Register – Byte 0” (Address Location = 0x0147).
102
I
NPUT
/O
UTPUT
xr
=
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