XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 337

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XRT94L33IB-L

Manufacturer Part Number
XRT94L33IB-L
Description
IC MAPPER DS3/E3/STS-1 504TBGA
Manufacturer
Exar Corporation
Datasheets

Specifications of XRT94L33IB-L

Applications
Network Switches
Interface
Bus
Voltage - Supply
3.14 V ~ 3.47 V
Package / Case
504-LBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XRT94L33IB-L
Manufacturer:
Exar Corporation
Quantity:
10 000
xr
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
2.3.1.2.4
The user can configure the Receive STS-3 TOH Processor block to automatically transmit the AIS-P
indicator, in the down-stream direction (towards the corresponding Receive STS-3c POH Processor block)
whenever (and for the duration that) it declares the LOS defect condition.
Note:
Figure 80 presents an illustration of the Receive STS-3 TOH Processor block transmitting the AIS-P indicator,
in the down-stream direction (towards the Receive STS-3c POH Processor block) whenever it declares the
LOS defect condition.
Figure 80 An Illustration of the Receive STS-3 TOH Processor block transmitting the AIS-P indicator,
in the down-stream direction (towards the Receive STS-3c POH Processor blocks) whenever it
declares the LOS defect condition
The user can implement this configuration by setting Bits 1 (Transmit AIS-P [down-stream] upon LOS) and 0
(AUTO AIS), within the “Receive STS-3 Transport – Auto AIS Control” Register, to “1” as depicted below.
XRT95L34 – Channel 0
STS-3/12
Interface
STS-3/12
Telecom
Interface
If the XRT94L33 is configured to operate in either the “1-Channel STS-3 ATM UNI/PPP” Mode, then the Receive
STS-3/12
Interface
STS-3/12
Telecom
Interface
STS-3/12
PECL
STS-3 TOH Processor block will transmit the AIS-P indicator to all three Receive SONET POH Processor
blocks, in parallel, whenever it declares the LOS defect condition.
Block
Block
STS-3/12
PECL
Block
Block
Block
Bus
CDR
Block
Bus
CDR
indicator, in the Downstream Direction (towards the Receive STS-3c POH Processor
blocks) whenever it declares the LOS Defect Condition
Configuring the Receive STS-3 TOH Processor block to automatically transmit the AIS-P
LOS
Processor
Transmit
STS-3/12
Processor
Processor
Transmit
STS-3/12
STS-3/12
Processor
Receive
Block
STS-3/12
TOH
Microprocessor
Receive
Block
Block
TOH
TOH
Microprocessor
Block
TOH
Interface
Interface
Block
Block
AIS-P
Processor
Processor
Transmit
STS-3/12
STS-3/12
Processor
Processor
Transmit
Receive
STS-3/12
STS-3/12
Receive
Block
Block
POH
POH
Block
Block
Synthesizer
POH
POH
Synthesizer
Clock
Block
Clock
Block
337
Cell Processor
Cell Processor
Cell Processor
Cell Processor
Processor
Processor
Transmit
Processor
Processor
Transmit
Transmit
Receive
Receive
Transmit
Block
Receive
Block
Receive
Block
ATM
PPP
PPP
Block
Block
Block
ATM
Block
ATM
PPP
PPP
Block
ATM
POS-PHY
POS-PHY
UTOPIA/
Transmit
Interface
Transmit
Interface
Interface
Interface
UTOPIA
POS-PHY
POS-PHY
UTOPIA/
Receive
Receive
Transmit
UTOPIA
Interface
Transmit
Interface
Interface
Interface
Receive
Receive
Block
Block
Block
Block
Block
Block
Block
Block
XRT94L33
Rev.1.2.0.

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