XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 235

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XRT94L33IB-L

Manufacturer Part Number
XRT94L33IB-L
Description
IC MAPPER DS3/E3/STS-1 504TBGA
Manufacturer
Exar Corporation
Datasheets

Specifications of XRT94L33IB-L

Applications
Network Switches
Interface
Bus
Voltage - Supply
3.14 V ~ 3.47 V
Package / Case
504-LBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XRT94L33IB-L
Manufacturer:
Exar Corporation
Quantity:
10 000
xr
XRT94L33
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
Rev.1.2.0.
Figure 36) is “dashed” because controlling this signal is not necessary if the user has executed “STEP 1” above.
• Whenever the “external circuit” samples both the “TxPOHEnable_n” and “TxPOHFrame_n” output pins
“high”, then it should place the very first bit (e.g., the most significant bit) of the “outbound” J1 byte onto the
“TxPOH_n” input pin, upon the very next falling edge of “TxPOHClk_n”. This data bit will be sampled and
latched into the “Transmit STS-3c POH Processor” block circuitry, upon the very next rising edge of
“TxPOHClk_n”.
• Afterwards, the “external circuit” should serially place the remaining seven bits (of the J1 byte) onto the
“TxPOH_n” input pin, upon each of the next seven falling edges of “TxPOHClk_n”.
• The “external circuit” should then revert back to continuously sampling the states of the “TxPOHEnable_n”
and “TxPOHFrame_n” output pins and repeat the above-mentioned process.
2.2.7.3.5
SUPPORT/HANDLING OF THE C2 BYTE
The Transmit STS-3c POH Processor block permits the user to control the value of the C2 byte by either of
the following options.
• Setting and controlling the “outbound” C2 Byte via Software
• Setting and controlling the “outbound” C2 Byte via the “TxPOH Input Port”
The details and instructions for using either or these features are presented below.
2.2.7.3.5.1
Setting and Controlling the Outbound C2 Byte via Software
The Transmit STS-3c POH Processor block permits the user to specify the contents of the C2 byte, within the
“outbound” STS-3c SPE via software command.
The user can configure the Transmit STS-3c POH Processor block to accomplish this by performing the
following steps.
STEP 1 – Write the value “0” into Bit 2 (C2 Insertion Type) within the “Transmit STS-3c Path – SONET
Control Register – Byte 0”, as depicted below.
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