XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 329
XRT94L33IB-L
Manufacturer Part Number
XRT94L33IB-L
Description
IC MAPPER DS3/E3/STS-1 504TBGA
Manufacturer
Exar Corporation
Specifications of XRT94L33IB-L
Applications
Network Switches
Interface
Bus
Voltage - Supply
3.14 V ~ 3.47 V
Package / Case
504-LBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XRT94L33IB-L
Manufacturer:
Exar Corporation
Quantity:
10 000
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3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
Mapper Control Register – Byte 2 (Direct Address = 0xN601)
This step enables the “Transmit STS-3 TOH Processor” block (associated with Channel “N”) to accept its
TOH bytes via the “TxPOH Input” port.
STEP 2 – Write the value “0” into Bit 1 (E2 Insert Method) within the “Transmit STS-3c Transport –
SONET Transmit Control Register – Byte 1; as depicted below.
Transmit STS-3Transport – SONET Transmit Control Register – Byte 1 (Address = 0x1902)
This step configures the Transmit STS-3 TOH Processor block to use the “TxPOH Input” port as the source
for the E2 byte, within each outbound STS-3c frame. In this mode, the Transmit STS-3c TOH Processor
block will accept the value, corresponding to the E2 byte (via the “TxPOH_n” input port) and it will write this
data into the E2 byte position, within the “outbound” STS-3c frame.
Using the “TxPOH_n Input” port to insert the E2 byte value into the “outbound” STS-3c data-stream
If the user intends to externally insert the E2 byte into the outbound STS-3c data-stream, via the “TxPOH_n”
input port, then they must design some external circuitry (which can be realized in an ASIC, FPGA or CPLD
solution) to do to the following.
• Continuously sample the “TxPOHEnable_n” and the “TxPOHFrame_n” output pins upon the rising edge of
the “TxPOHClk_n” output clock signal.
A simple illustration of this “external circuit” being interfaced to the “TxPOH Input Port” is presented below in
Figure 76.
STS-3 OH
Pass Thru
B
B
R/W
R/O
IT
IT
0
0
7
7
Reserved
Loop-back
Remote
STS-3
B
B
R/W
R/O
IT
IT
0
0
6
6
STS-3 Local
Loop-back
E2 Insert
Method
B
B
R/W
R/W
IT
IT
0
0
5
5
STS-3 TOH
E1 Insert
Method
Insert
B
B
R/W
R/W
IT
IT
1
X
4
4
329
Loop-Timing
F1 Insert
Method
B
B
R/W
R/W
IT
IT
X
0
3
3
POH Pass
S1 Insert
Method
B
B
Thru
R/W
R/W
IT
IT
0
X
2
2
K1K2 Insert
(Ingress)
Receive
Method
Enable
STS-1
B
B
R/W
R/W
IT
IT
X
0
1
1
XRT94L33
M0M1 Insert
Method[1]
Transmit
(Egress)
Enable
STS-1
Rev.1.2.0.
B
B
R/W
R/W
IT
IT
0
X
0
0
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