CDC3205G-C Micronas, CDC3205G-C Datasheet - Page 132

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CDC3205G-C

Manufacturer Part Number
CDC3205G-C
Description
Automotive Controller Family The Device is a Microcontroller For Use in Automotive Applications.the On-chip Cpu is an Arm Processor ARM7TDMI with 32-bit Data And Address Bus, Which Supports Thumb format Instructions.
Manufacturer
Micronas
Datasheet
CDC 32xxG-C
Table 20–1:
values to the respective unit’s sine, cosine and quadrant reg-
isters on the next zero transition of the FRC, after a maxi-
mum of 256 f
download, flag BUSY is reset and the respective unit will
immediately start producing the output signals with the
desired timing (see Table 20–4) on the proper pins (see
Table 20–3).
The above procedure for loading values to a first unit is
repeated for all others. Make sure that the BUSY flag is 0
before rewriting registers SMVC, SMVCOS and SMVSIN.
20.1.4.2. Rotor Zero Position Detection
During Rotor Zero Position Detection one of a unit’s H-Ports
(Table 20–1) has temporarily to be operated as input to an
internal analog comparator. Reconfigure this port as Special
Input and select this port by register SMVMUX.x. Refer to
“Ports” for details.
Reading of the induced voltage at the measured motor wind-
ing is started by setting the questioned unit’s control bit
SMVCMP.ACRx to 1. The respective analog comparator’s
output will now be sampled. Once three consecutive “1” sam-
ples (spaced 1/f
tor input voltage - are received, a 1 may be read from the
questioned unit’s result flag SMVCMP.ACRx, indicating that
the Rotor Zero Position Detection is under way.
Resetting the questioned unit’s control bit SMVCMP.ACRx to
0 stops the sampling and resets the result flag. When after a
130
Contr.
Unit
SMA
SMB
SMC
SMD
SME
SMF
SMG
All
HW Options
Item
SME/PWM selection
SMG/PWM selection
Input clock selection
Rotor Zero Position
Detection Clock
Unit specific settings
SM
RZP
input clock cycles. After completing the
) - indicating a sufficient analog compara-
Address Item
PM.H7
PM.H0
SM
RZPC
June 12, 2003; 6251-579-1PD
Initialization
SMAn+/- outputs
SMA-COMP inputs
SMBn+/- outputs
SMB-COMP inputs
SMCn+/- outputs
SMC-COMP inputs
SMDn+/- outputs
SMD-COMP inputs
SMEn+/- outputs
SME-COMP inputs
SMFn+/- outputs
SMF-COMP inputs
SMGn+/- outputs
SMG-COMP inputs
restart of the above sampling procedure and after a suffi-
ciently long capture period still no 1 was read from the ques-
tioned unit’s result flag SMVCMP.ACRx, this indicates that
Rotor Zero Position Detection is complete.
Parallel Rotor Zero Position Detection on all control units is
permitted.
After completion of Rotor Zero Position Detection, reconfig-
ure the comparator input port as Special Out.
20.1.5. Inactivation
Returning the SMV module to standby mode by resetting bit
SR0.SM will immediately halt the FRC, return all output sig-
nals to 0, reset all internal registers and disconnect the com-
parators from supply.
Setting
H4.0 to H4.3 special out
H4.0 to H4.3 special in
H3.0 to H3.3 special out
H3.0 to H3.3 special in
H2.0 to H2.3 special out
H2.0 to H2.3 special in
H5.0 to H5.3 special out
H5.0 to H5.3 special in
H7.0 to H7.3 special out
H7.0 to H7.3 special in
H1.0 to H1.3 special out
H1.0 to H1.3 special in
H0.0 to H0.3 special out
H0.0 to H0.3 special in
PRELIMINARY DATA SHEET
SR0.SM
Enable Bit
Micronas

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