CDC3205G-C Micronas, CDC3205G-C Datasheet - Page 143

• Manufacturer Part Number: CDC3205G-C
• Description: Automotive Controller Family The Device is a Microcontroller For Use in Automotive Applications.the On-chip Cpu is an Arm Processor ARM7TDMI with 32-bit Data And Address Bus, Which Supports Thumb format Instructions.
• Manufacturer: Micronas

PRELIMINARY DATA SHEET
Fig. 22–3:
Fig. 22–4:
22.2. Registers
The DMA registers can be read or written 32-bit wide, asyn-
chronous and without wait states.
Micronas
nRW
r/w
r/w
r/w
r/w
nRW
start SPIx
DVB
the I/O module as well as DMA controller can do their
work between two consecutive DMA requests.
GBus
DREQ1
SPIx
DACK1
Int Src
DINT1
A7
0
7
DMA SPI Interaction
DMA Port Interaction
0
0
6
DMA Vector Base
0
0
5
1
1
DREQx
DACKx
rd
DREQ1
DACK1
rd
A23 to A16
0
0
A15 to A8
4
0x0000
DMA
DMA
DINTx
DINT1
&
&
0
0
&
&
3
0
0
2
0
0
1
GBus
SPIx
rd SPIxD
wr SPIxD
June 12, 2003; 6251-579-1PD
rd GD
wr GD
0
0
ICU
ICU
0
3
2
1
0
Res
Offs
Fig. 22–5:
DE
r/w1:
r/w0:
Enables the DMA controller clock (fSYS) and the clock for all
DMA Timer (fDMA). Before setting to 0, make sure that all
individual DMA channels are terminated.
SRC
r31-0:
r/w
DST
00C
008
004
000
DE
7
7
6
5
4
3
2
1
0
8-bit count
DMA Vector 3
DMA Vector 2
DMA Vector 1
DMA Vector Table
x
6
Default
DMA Enable
enable DMA controller
disable DMA controller
Priority source output
The number of the highest pending and
enabled DMA request.
32 Bit
Data
Data
Data
Data
Data
Data
Data
Data
DMA Status Register
x
5
4
0x00
24-bit DMA Block Addr.
CDC 32xxG-C
3
DMA Vector Base +
DMA Channel * 4
DMA Vector Base
SRC
2
1
0
0
Res
141
Offs