CDC3205G-C Micronas, CDC3205G-C Datasheet - Page 256

• Manufacturer Part Number: CDC3205G-C
• Description: Automotive Controller Family The Device is a Microcontroller For Use in Automotive Applications.the On-chip Cpu is an Arm Processor ARM7TDMI with 32-bit Data And Address Bus, Which Supports Thumb format Instructions.
• Manufacturer: Micronas

CDC 32xxG-C
Fig. 34–12:
6
are tristate and FBUSQ is high. See section ‘Electrical Characteristics’ for the weak hold currents for pull-down (Ipd) and for pull-
up (Ipu).
Fig. 34–13:
CE0Q is used for low power mode. Input data are latched
with the rising edge of CE0Q and are weakly held as long as
CE0Q stays high.
254
FSYS
nWAIT
FSYSint
FBUSQint
CE0Q
WEQ/RWQ
OEQ
FBUSQ
CExQ
A
OEQ
BWQ[3:0],
WEQ/RWQ
D[31:0]
) During the high level of FBUSQ the previous data bus levels are weakly held. Thus the data bus is defined when the bus drivers
write data, no wait state
6)
Async SRAM/Flash Timing, Write with Wait State, followed by a Read Cycle
CE0Q Timing in PLL/FAST and SLOW/DEEP SLOW modes (CR.EB2 set to 0, CR.EB1 and CR.EASY set to 1)
A1
D1
fast mode
t
t
aCES
aAS
6)
slow mode
t
write data, 1 wait state
aDSW
t
aBWS
June 12, 2003; 6251-579-1PD
A2
D2
t
t
t
t
aAH
aAH
aAH
aDDT
read data
PRELIMINARY DATA SHEET
6)
Micronas