CDC3205G-C Micronas, CDC3205G-C Datasheet - Page 70

• Manufacturer Part Number: CDC3205G-C
• Description: Automotive Controller Family The Device is a Microcontroller For Use in Automotive Applications.the On-chip Cpu is an Arm Processor ARM7TDMI with 32-bit Data And Address Bus, Which Supports Thumb format Instructions.
• Manufacturer: Micronas

CDC 32xxG-C
Fig. 7–2:
7.1. Functional Description
The power saving logic combines all wake-up sources. It is
completely supplied by UVDD. It contains an RC oscillator, a
20-bit sub second counter, an RTC, multiplexers to select dif-
ferent taps of the sub second counter or of the RTC, a Poll-
ing Module and the logic for up to ten Wake Ports.
The RTC Module output can generate an interrupt or a wake-
up signal. All Wake Ports can generate a collective interrupt
or a wake-up signal. The Polling Module can drive an H-Port
and generate a strobe signal, which allows a Wake Port to
trigger on a dedicated input level. Several internal clock sig-
nals can be output via CO0.
68
WSC.RTC
CPUM=WKST
20..50kHz
OSC.SRC
WSC.AST
SMX.BYP
WPMx.MOD
POL.ENA
CANx-RX
OSC.XM
OSC.RC
CPUM=IDLE
POL.OE
4/5MHz
WSC.P
RES_5
UPort
PPort
CMOS Threshold
Power Saving Module Functional Block Diagram
Polling Module
en
en
Oscillator
Oscillator
4MXTL
S
R
S
R
RC
3 7 10 14
Q
Q
Wake In
CLK Mux
20-Bit Rel Reg SSR
Sub Sec Cnt SSC
WKST_5
IDLE_5
f
PC
&
1/8
10..19
Trigger Mode
1
Edge/Level
& Enable
enable
Poll Clk
f
SS
f
S
1Hz
Poll Period
load
POL.PER Mux
trigger
June 12, 2003; 6251-579-1PD
POL.DEL
10x
Counter
Delay
f
WUS.WPx
PP
1 2 4 8 16 32 1 2 4 8 16 32 1 2 4 8 16 24
S
R
Q
SEC
Wake Out
7.1.1. RTC Module
The RTC Module is mainly composed of a sub second
counter (SSC) and it’s reload register (SSR), and the real
time counter’s second, minute and hour counters. The input
clock for the sub second counter (f
between the external quartz oscillator clock divided by 8 or
an internal RC oscillator clock. The reload value SSR shall
be selected in a way, that output signal of the SSC (f
sponds with a one Hertz clock. The signal f
signal for SSC, which is a down counter, as well as the input
clock to the second counter (RTC.SEC). The second counter
clocks the minute counter (RTC.MIN) which on his part
clocks the hour counter (RTC.HR). All of them are up
counters.
&
f
m
RTCC.SEL Mux
1
wake-up
Poll Clk
UVDD
MIN
RTC Out
WUS.RTC
f
PP
S
R
&
SMX.MUX
Q
Mux
f
h
Port Wake Module
PRELIMINARY DATA SHEET
&
1
HR
wake-up
RTC Module
1
Poll Out
5V/2.5V
5V/2.5V
5V/2.5V
f
d
LS
LS
LS
SS
&
1
) can be selected
S
WAKE_RES
is the reload
SMX Out
ISN RTC
H0.2
ON_5
ISN WAPI
Micronas
S
) corre-