CDC3205G-C Micronas, CDC3205G-C Datasheet - Page 96

• Manufacturer Part Number: CDC3205G-C
• Description: Automotive Controller Family The Device is a Microcontroller For Use in Automotive Applications.the On-chip Cpu is an Arm Processor ARM7TDMI with 32-bit Data And Address Bus, Which Supports Thumb format Instructions.
• Manufacturer: Micronas

CDC 32xxG-C
PRELIMINARY DATA SHEET
11.5.7.2. Global Enable Flag GE
Protection of critical code can be achieved by disabling the
nIRQ output with the global enable flag CRI.GE. The GE flag
changes its value in the cycle after the data transfer of the
store instruction. In this cycle the next instruction is in the
execution stage of the CPU and will be executed. Due to this
one NOP is required between the store instruction, which
clears CRI.GE, and the first instruction of the critical code.
11.5.7.3. Force Priority
To protect critical code, further IRQ interrupts can be dis-
abled by writing the maximum priority to the forced priority
register AFP. Modifying AFP works like clearing the GE flag.
One NOP is required between the store instruction, which
writes AFP, and the first instruction of the critical code.
11.5.7.4. Disabling via ISN
At last, critical code protection can be achieved by disabling
all ISNs by clearing their enable flag E. The priority encoder
is calculated at the beginning of a cycle. Due to this, chang-
ing an ISN register becomes effective only in the next cycle.
Two NOPs are required between the store instruction, which
clears the flag E, and the first instruction of the critical code.
11.5.8. Switching an Interrupt Vector
Interrupt service routines of an interrupt source can easily be
changed by entering the start address of the new ISR at the
corresponding entry of the interrupt vector table.
11.5.9. Switching the Vector Table
It can be switched between different vector tables if they
have been installed. Changing the vector table is simply
done by writing the base address of the new vector table to
register VTB. All subsequent interrupt service routines must
relate to this vector table. Due to this, it is necessary for an
ISR in such an environment, to read the location of the cur-
rent vector table from register VTB before accessing it.
Be careful when doing vector table switching within an ISR.
Interrupted ISRs could try to do the IExit from an outdated
table.
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Micronas
June 12, 2003; 6251-579-1PD