CDC3205G-C Micronas, CDC3205G-C Datasheet - Page 57
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CDC3205G-C
Manufacturer Part Number
CDC3205G-C
Description
Automotive Controller Family The Device is a Microcontroller For Use in Automotive Applications.the On-chip Cpu is an Arm Processor ARM7TDMI with 32-bit Data And Address Bus, Which Supports Thumb format Instructions.
Manufacturer
Micronas
Datasheet
1.CDC3205G-C.pdf
(260 pages)
- Current page: 57 of 260
- Download datasheet (3Mb)
PRELIMINARY DATA SHEET
6. Core Logic
6.1. Control Word (CW)
A number of important system configuration properties are
selectable during device start-up by means of a unique Con-
trol Word (CW).
6.1.1. Reset Active
At the end of the reset period, the device fetches this CW
from address locations 0x20 to 0x23 of a source that is
determined by the state of pins TEST and TEST2 and flag
MFPLR.MFPL, see Table 6–1 for MCM and EMU parts,
Table 6–2 for ROM parts.
Table 6–1:
parts (CPGA257)
Table 6–3: Some common system configurations and the corresponding CW setting
Micronas
MCM
Control Word Fetch
desired from
Int. Flash
Int. Flash
Ext. via Multi Function port
Int. Special Function ROM
1)
MFPL = 0 set before
Part
Type
EMU
MCM
ROM
Only available after a non-Power-On RESET with
Program Start desired from
ext. 32-Bit sync SRAM (e.g. MT55L256L32F)
on EMU port
ext. 32-Bit async auto-power-down Flash (2x
Am29LV400BT) on EMU port
ext. 16-Bit async. auto-power-down Flash
(Am29LV400BT) on EMU port
int. 16-Bit Flash (Am29LV400BT)
int. 16-Bit ROM
CW fetch in MCM parts (QFP128), and in EMU
EMU
Ext. via EMU
port
Ext. via EMU
port
Necessary Reset con-
figuration
TEST2
0
0
1
TEST
0
1
x
June 12, 2003; 6251-579-1PD
MFPL
x
1
0
x
1)
Additional desired properties
Trace Bus ETM mode
16-Bit ROM/Flash emulation,
Trace Bus ETM mode
16-Bit ROM/Flash emulation,
Trace Bus Analyzer mode,
Appl. JTAG released
-
Trace Bus Analyzer mode
Trace Bus ETM mode
-
-
As can be seen from Table 6–1, the device disables external
access (through the Multi Function port) to internal code, as
long as MFPLR.MFPL is 1 (= state after UVDD power-up).
Setting it to 0 requires internal SW. By this means, an effec-
tive device lock mechanism is implemented, that prevents
unauthorized access to internal SW. See section 6.2. on the
Device Lock Module (DLM) for details.
In ROM parts, flag MFPLR.MFPL is available, but does not
lock the Multi Function port. Thus Table 6–1 reduces to Table
6–2.
Table 6–2: CW fetch in ROM parts (QFP128)
6.1.2. Reset Inactive
When exiting Reset, the CW is read and stored in the Control
Register (CR) and the system will start up according to the
configuration defined therein.
Normally the CW is fetched from the same memory that the
system will start executing code from. Table 6–3 gives fix
CWs for a list of the most commonly used configurations.
Control Word Fetch desired from
Internal ROM
External via Multi Function port
Int. Special Function ROM
Necessary CW
31:16
0xFFBA
0xFFBB
0xFFBB
0xFFBA
Don’t care
Don’t care
Don’t care
Don’t care
CDC 32xxG-C
Necessary Reset
config. of pins
TEST2
0
0
1
15:0
0x835F
0x835F
0xA3DF
0x675F
0x2F5F
0x4F5F
0x7F5F
0x7F5F
TEST
0
1
x
55
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