CDC3205G-C Micronas, CDC3205G-C Datasheet - Page 138

• Manufacturer Part Number: CDC3205G-C
• Description: Automotive Controller Family The Device is a Microcontroller For Use in Automotive Applications.the On-chip Cpu is an Arm Processor ARM7TDMI with 32-bit Data And Address Bus, Which Supports Thumb format Instructions.
• Manufacturer: Micronas

CDC 32xxG-C
Fig. 21–2:
For the effect of CPU clock modes on the operation of this
module refer to section “CPU and Clock System” (see
Table 4–1 on page 37). During Power Saving mode the LCD
Logic is switchted off, the port outputs are held at low level
but the port register contents will be preserved.
21.1.5. Cascading of LCD Driver Modules
For expansion purposes, the LCD module may be cascaded
with external LCD driver ICs. Master or slave mode is select-
able for the LCD module while in standby. Special signals
136
LCD-SYNC-OUT
LCD-CLK-OUT
LCD-SYNC-IN
SR0.LCD
LCD-CLK-IN
HW Option
f
Block Diagram
CLK
HW Option
en
1/1.5
1/2.5
1/1
LCD Supply
0
1
0
1
UV
DD
ULCDLD.LCDSLV
+
+
-
-
1
SR0.LCD
1/15
June 12, 2003; 6251-579-1PD
overflow
2
1
reset
/
/
3
3
UV
UV
DD
DD
8 x frame frequency
Counter
8 State
U0DPM.SG0_3
U0DPM.SG1_3
U8DPM.SG5_3
U0TRI.SG0_1
U0TRI.SG1_1
U8TRI.SG5_1
U0NS.SG0_2
U0NS.SG1_2
U8NS.SG5_2
U0D.SG0_0
U0D.SG1_0
U8D.SG5_0
provide phase and frequency synchronism for the LCD frame
among the cascaded ICs.
For master mode, set flag LCDSLV in register ULCDLD
LOW. The module always directs signal LCD-SYNC-OUT to
pins U8.5 and LCD-CLK-OUT to pins U8.3. They connect to
external slave ICs’ SYNC-IN and CLK-IN inputs for synchro-
nization.
For slave mode, set flag LCDSLV in register ULCDLD HIGH.
Configure pins U8.4 and U8.2 to receive signals LCD-SYNC-
IN and LCD-CLK-IN from an external master IC’s SYNC-
Backplane
Generator
3
wr ULCDLD
load
1
0
0
0
0
1
0
0
0
0
1
0
0
0
0
1
Backplane Driver
Backplane Driver
Backplane Driver
Backplane Driver
Analog Switch
Analog Switch
Analog Switch
Analog Switch
Segment Driver
Segment Driver
Segment Driver
Analog Switch
Analog Switch
Analog Switch
PRELIMINARY DATA SHEET
and
and
and
and
and
and
and
UV
DD
2
/
3
UV
1
/
3
0
1
2
3
DD
UV
UV
DD
SS
U0MODE.L0
U0MODE.L1
U8MODE.L5
U4MODE.L0
1
1
1
1
1
1
1
Micronas
U0.0
U0.1
U8.5
U4.0
U4.1
U4.2
U4.3