CDC3205G-C Micronas, CDC3205G-C Datasheet - Page 64

• Manufacturer Part Number: CDC3205G-C
• Description: Automotive Controller Family The Device is a Microcontroller For Use in Automotive Applications.the On-chip Cpu is an Arm Processor ARM7TDMI with 32-bit Data And Address Bus, Which Supports Thumb format Instructions.
• Manufacturer: Micronas

CDC 32xxG-C
V
Fig. 6–3:
6.5.2.3. Watchdog
The Watchdog module serves to monitor undisturbed pro-
gram execution. A failure of the program to retrigger the
Watchdog within a pre-selectable time will pull the pin
RESETQ low and thus reset the IC (Fig. 6–3 and 6–4). This
reset source is disabled by any POR and any WAKE-Reset.
It is only enabled after a write access to location CSW1.
The Watchdog (Fig. 6–4) contains a down-counter that gen-
erates a reset when it wraps from zero to 0xFF. It is reloaded
with the content of the watchdog timer register, when, upon a
write access to location CSW1, watchdog trigger registers 1
and 2 contain bit-complemented values. An IC reset resets
the watchdog timer register to 0xFF, thus setting the Watch-
dog to the maximum reset interval.
The three Watchdog registers are programmed by writes to
the same location CSW1. First write the desired watchdog
timer value (only values between 1 and 255 are allowed):
62
(internal signal)
wake reset
REFR
wr1 CSW0.FHR
WKST_5
WAKE_RES_5
CPUM=WKST
IDLE_5
CPUM=IDLE
CSW0.CMA
wr CSW1
Reset Logic Block Diagram
f
POR
XTAL
f
SUP
+
-
RES_5
supervision
reset in
clock
1
Watchdog
ON_5
1
June 12, 2003; 6251-579-1PD
CLS
&
&
WDRES
1
1
&
On further writes, to trigger a reload of the counter, alternat-
ingly write a retrigger value (routed to trigger register 1) (not
necessarily the former timer value) and its bit-complement
(routed to trigger register 2) to CSW1. Failure to reload will
result in a counter underflow and a Watchdog reset.
Never change the retrigger value. Writing a wrong value to
CSW1 immediately prohibits further reloading of the watch-
dog counter.
The flag CSW1.WDRES is set as soon as the watchdog
counter wraps to 0xFF. Thus, it is true after a Watchdog
reset. Only a Supply Supervision reset or a write access to
CSW1 clears it.
>1
Reset extension
8 or 2048
f
XTAL
FAST and PLL modes: Value
clocks
SLOW modes: Value
&
RESINT_5
PRELIMINARY DATA SHEET
S Q
R
1
=
Interval f
------------------------------- 1
=
S Q
R
S Q
R
S Q
R
S Q
R
D Q
R
D Q
R
Interval f
------------------------------- 1
128
1
15
–
RESETQ
CSW1.FHR
CSW1.CLM
CSW1.POR
CSW1.PIN
CSW1.WKST
CSW1.IDLE
res CSW1
core reset
port reset
power on
15
Micronas
–