CDC3205G-C Micronas, CDC3205G-C Datasheet - Page 42

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CDC3205G-C

Manufacturer Part Number
CDC3205G-C
Description
Automotive Controller Family The Device is a Microcontroller For Use in Automotive Applications.the On-chip Cpu is an Arm Processor ARM7TDMI with 32-bit Data And Address Bus, Which Supports Thumb format Instructions.
Manufacturer
Micronas
Datasheet
CDC 32xxG-C
Table 4–3:
40
SR1.CPUM
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Operating Mode Selection and Effect on Clocks
Oper-
ating
Mode
SLOW
FAST
DEEP
SLOW
PLL
WAKE
/STBY
IDLE
rsvd
PLL2
f
f
128
f
f
128
n
f
-
-
-
n
f
XTAL
XTAL
XTAL
XTAL
XTAL
BUS
/
/
f
f
128
f
f
128
n/m
f
-
-
-
n/m
f
XTAL
XTAL
XTAL
XTAL
XTAL
IO
/
/
f
f
f
f0 to f4 = 0
n/m
f
-
-
-
n/m
f
XTAL
XTAL
XTAL
XTAL
0
June 12, 2003; 6251-579-1PD
f
f
f
n/2m
f
-
-
-
n/m
f
XTAL
XTAL
XTAL
XTAL
1
Fig. 4–2:
4.3.1. PLL
The PLL is composed of a Phase Comparator, a Voltage
Controlled Oscillator VCO, a Frequency Divider and an inter-
nal bypass. The Phase Comparator compares the input fre-
quency f
Divider, f
to the phase difference of the two input frequencies. V
trols the VCO which outputs the desired frequency. This fre-
quency is fed back by the Frequency Divider to the Phase
Comparator. The Frequency Divider divides the input fre-
quency down to f
The phase-locked state of the PLL is signaled by a lock sig-
nal. It is available as flag PLLC.LCK. It may be routed to the
SR1.CPUM=3
4/5MHz
ON_5
PLLC.PMF
ERMC.EOM
SR1.CPUM=3, 7
waitq
IOC.IOP
SR1.CPUM=3, 7
stpclk
f
XTAL
n/m f
=
n f
XTAL
XTAL
REF
XTAL
Clock System
. It outputs the voltage V
1/2
ERM
&
PLL
with the output frequency of the Frequency
1/m
x n
&
REF
1/128
which ideally is the same as f
SR1.CPUM=0, 2
SR1.CPUM=0, 2
PRELIMINARY DATA SHEET
1
VDD
&
P
SR1.CPUM=2
, which is proportional
CPU
ICU
DMA
Mem. Ctrl.
f
f
f
f
f
f
f
PLLC.LCK
pll_lock
ERMC.INPH
f
nWAIT
f
ROM
Flash
RAM
f
I/O Bus
f
0perm
0
1
2
3
4
17
SYS
BUS
IO
SUP
Micronas
XTAL
P
.
con-

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