CDC3205G-C Micronas, CDC3205G-C Datasheet - Page 149

• Manufacturer Part Number: CDC3205G-C
• Description: Automotive Controller Family The Device is a Microcontroller For Use in Automotive Applications.the On-chip Cpu is an Arm Processor ARM7TDMI with 32-bit Data And Address Bus, Which Supports Thumb format Instructions.
• Manufacturer: Micronas

PRELIMINARY DATA SHEET
23. Graphic Bus Interface
The Graphic Bus Interface (GB) is intended to support the
operation of external LCD driver ICs (e.g. SED1560 by
Epson).
23.1. Functions
The DMA module copies 8bit pixel data bytes by direct mem-
ory access (DMA) to the external IC’s graphic RAM with help
of that IC’s internal autoincrement address counter, and with-
out CPU interaction. Other off-chip registers, allowing control
of the display behavior (blinking, scrolling, etc.), have to be
written and read by CPU operations.
Fig. 23–1:
The necessary timing is done autonomously by the GB logic.
Any U-Port may be used as address output port operated by
23.2. GB Registers
A write access to this register generates the DACK signal
and writes to registers UxD. A read access to this register
generates the DACK signal and reads from registers UxPIN.
Micronas
fIO
D
wr GD
rd GD
DACKx
DINTx
DREQx
nRW
r/w
GD
7
Port Bus Block Diagram
6
Graphic Bus Data Register
5
Interface
Graphic
Bus
4
Data
0x00
3
2
GOEQ
GWEQ
GD0 to7
1
June 12, 2003; 6251-579-1PD
0
0
Res
Offs
Features
– DMA read/write to external device
– CPU read/write to external device
– Read/write timing generation
– Read/write control signals generation
the CPU. Please refer to section DMA for information about
GB DMA interaction.
The register GD provides the data interface for the GB. Writ-
ing to GD outputs the data byte at U5.0 to U5.3 (low nibble)
and U7.4 to U7.7 (high nibble). Reading from GD inputs a
data byte from above pins. The assignment to external sig-
nals is shown in table 23–1.
Table 23–1:
TIM
w15-1:
w0:
r/w
Port
U5.0
:
U7.7
U6.2
U6.1
1) Any U-Port may be used as address output port.
GC
1)
7
Name
GDB0
:
GDB7
GADB
GWEQ
GOEQ
6
GB Timer
GB timing, equation:
GB logic is disabled, clock input is disabled
Port Assignment
TIM
Graphic Bus Control Register
5
t
GB
=
4
2
----------------- -
External data bus
External address bus
External write signal
External read signal
0x00
TIM
f
IO
CDC 32xxG-C
E
3
+
1
BSY
2
SEQ
1
DTA
0
0
Res
147
Offs