CDC3205G-C Micronas, CDC3205G-C Datasheet - Page 252

• Manufacturer Part Number: CDC3205G-C
• Description: Automotive Controller Family The Device is a Microcontroller For Use in Automotive Applications.the On-chip Cpu is an Arm Processor ARM7TDMI with 32-bit Data And Address Bus, Which Supports Thumb format Instructions.
• Manufacturer: Micronas

CDC 32xxG-C
Fig. 34–6:
34.3.2. External Trace Interfacing
For a mapping of the IC pins to external trace tools see the
Specification of the Evaluation Board Kit (EVB).
34.3.3. Memory Interface Characteristics
Table 34–10:
TCASE= 0 to 35°C, C
250
Symbol
DFBUSQ
Synchronous SRAM
t
t
t
t
t
t
t
Asynchronous SRAM
t
t
t
t
t
t
t
sAS
sAH
sCES
sDSR
sDHR
sDSW
sDDT
aAS
aAH
aCES
aOES
aBWS
aDSR
aDHR
Synchronous SRAM (e.g. MT55L256L32F) as emulation RAM or Special Function memory
Parameter
FBUSQ High to Low Ratio
sync Address Setup Time
sync Address Hold Time
sync Chip Enable Setup
sync Data Setup Read Time
sync Data Hold Read Time
sync Data Setup Write Time
sync Data drive Tristate
async Address Setup Time
async Address Hold Time
async Chip Enable Setup
async Output Enable Setup
async Byte Write Setup
async Data Setup Read
async Data Hold Read Time
UVSS=UVSS1=FVSS=HVSSn=EVSSn=AVSS=0V, 3.5V<AVDD=UVDD=UVDD1<5.5V, 4.5V<EVDDn<5.5V,
A[19:8], AICU[7:2]
L
= 70pF
WEQ/RWQ
BWQ[3:0]
FBUSQ
D[31:0]
CE1Q
Min.
47.5
0
0
25
0
0
0
25
June 12, 2003; 6251-579-1PD
Typ.
0
0
0
0
0
0
0
CLK
CE#
R/W#
BW#[d:a]
SA, SA1,SA0
DQ[d:a]
Max.
52.5
20
15
10
10
256k x 32
SSRAM
Unit
%
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ADV/LD#
MODE
CE2#
CKE
OE#
CE2
ZZ
Test Conditions
PLL mode
13ns ADB to Pad, 4ns Pad to DB
PRELIMINARY DATA SHEET
3V3
GND
Micronas