IP-PCI/MT32 Altera, IP-PCI/MT32 Datasheet - Page 151

• Manufacturer Part Number: IP-PCI/MT32
• Description: IP CORE - 32-bit 66MHz PCI Master/Target
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IP-PCI/MT32

• Software Application: IP CORE, Interface And Protocols, PCI
• Supported Families: Arria GX, Cyclone, HardCopy II, MAX II, Stratix
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: PCI Compiler, Master/Target, 32 bit
• License: Initial License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Altera Corporation
January 2011
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Target Transaction Terminations
For all transactions except configuration transactions, the local-side
device can request a transaction to be terminated with one of several
termination schemes defined by the PCI Local Bus Specification, Revision
3.0. The local-side device can use the lt_discn signal to request a retry
or disconnect. These termination types are considered graceful
terminations and are normally used by a target device to indicate that it
is not ready to receive or supply the requested data. A retry termination
forces the PCI master that initiated the transaction to retry the same
transaction at a later time. A disconnect, on the other hand, does not force
the PCI master to retry the same transaction.
The local-side device can also request a target abort, which indicates that
a catastrophic error has occurred in the device. This termination is
requested by asserting lt_abortn during a target transaction other than
a configuration transaction.
For more details on these termination types, refer to the PCI Local Bus
Specification, Revision 3.0.
Retry
The local-side device can request a retry if, for example, the device cannot
meet the initial latency requirement or because the local resource cannot
transfer data. A target device signals a retry by asserting devseln and
stopn, while deasserting trdyn before the first data phase. The local-
side device can request a retry as long as it did not supply or request at
least one data phase in a burst transaction. In a write transaction, the
local-side device may request a retry by asserting lt_discn as long as it
did not assert the lt_rdyn signal to indicate it is ready for a data transfer.
If lt_rdyn is asserted, it can result in the PCI MegaCore function
asserting the trdyn signal on the PCI bus. Therefore, asserting
lt_discn forces a disconnect instead of a retry. In a read transaction, the
local-side device can request a retry as long as data has not been
transferred to the PCI MegaCore function.
MegaCore functions, excluding the 64-bit signals as noted for pci_mt32
and pci_t32.
PCI Compiler Version 10.1
Figure 3–23
Functional Description
applies to all PCI
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