IP-PCI/MT32 Altera, IP-PCI/MT32 Datasheet - Page 30

• Manufacturer Part Number: IP-PCI/MT32
• Description: IP CORE - 32-bit 66MHz PCI Master/Target
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IP-PCI/MT32

• Software Application: IP CORE, Interface And Protocols, PCI
• Supported Families: Arria GX, Cyclone, HardCopy II, MAX II, Stratix
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: PCI Compiler, Master/Target, 32 bit
• License: Initial License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Installation and Licensing
Figure 3. Directory Structure
18
PCI Compiler User Guide
<path>
Installation directory.
ip
Contains the Altera MegaCore IP Library and third-party IP cores.
altera
Contains the Altera MegaCore IP Library.
common
Contains shared components.
pci_compiler
Contains the PCI Compiler files.
lib
Contains encrypted lower-level design files and other support files.
On Linux systems, you must add this directory as a user library in the Quartus II software.
ip_toolbench
Contains common IP Toolbench files.
const_files
Contains constraint files that include all necessary assignments to meet your PCI timing requirements for
all supported Altera device families and development kits.
sopc_flow
Contains the files that are specific for PCI Compiler with SOPC Builder.
megawizard_flow
Contains the files that are specific for PCI Compiler with MegaWizard flow.
ip_toolbench
Contains the necessary files for the parameterization wizard.
sopc_builder
Contains the necessary files for the SOPC Builder GUI. For Linux, this directory must be
added to the Component/Kit Library search path by choosing SOPC Builder Setup (File menu).
example
Contains example Quartus II projects using SOPC Builder.
testbench
Contains the Verilog HDL and VHDL testbenches for simulating designs that include the PCI-Avalon bridge.
ref_designs
Contains reference designs for common functions implemented with the PCI MegaCore functions.
testbench
Contains Verilog HDL and VHDL testbenches for simulating designs.
qexamples
Contains example Quartus II projects and simulation waveforms for each of the PCI MegaCore functions.
inc
Contains a header file that can be used in PCI Compiler with SOPC Builder flow. The header
file contains macros to access control and status registers inside the PCI-Avalon bridge.
PCI Compiler Version 10.1
Altera Corporation
January 2011