IP-PCI/MT32 Altera, IP-PCI/MT32 Datasheet - Page 79

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IP-PCI/MT32

Manufacturer Part Number
IP-PCI/MT32
Description
IP CORE - 32-bit 66MHz PCI Master/Target
Manufacturer
Altera
Type
MegaCorer
Datasheet

Specifications of IP-PCI/MT32

Software Application
IP CORE, Interface And Protocols, PCI
Supported Families
Arria GX, Cyclone, HardCopy II, MAX II, Stratix
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Rohs Compliant
NA
Function
PCI Compiler, Master/Target, 32 bit
License
Initial License
Lead Free Status / RoHS Status
na
Lead Free Status / RoHS Status
na
Figure 3–4. pci_t32 Functional Block Diagram
Altera Corporation
January 2011
cben[3..0]
ad[31..0]
devseln
framen
stopn
perrn
serrn
trdyn
intan
irdyn
idsel
rstn
par
clk
Parity Checker &
PCI Address/
Data Buffer
PCI Target
Generator
Control
PCI Compiler Version 10.1
Parameterized
Configuration
Registers
pci_t32
Data/Command/
Local Address/
Local Target
Byte Enable
Control
Functional Description
l_adi[31..0]
l_dato[31..0]
l_adro[31..0]
l_beno[3..0]
l_cmdo[3..0]
lt_rdyn
lt_discn
lt_abortn
lirqn
lt_framen
lt_ackn
lt_dxfrn
lt_tsr[11..0]
cmd_reg[6..0]
stat_reg[6..0]
3–5

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