IP-PCI/MT32 Altera, IP-PCI/MT32 Datasheet - Page 266

• Manufacturer Part Number: IP-PCI/MT32
• Description: IP CORE - 32-bit 66MHz PCI Master/Target
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IP-PCI/MT32

• Software Application: IP CORE, Interface And Protocols, PCI
• Supported Families: Arria GX, Cyclone, HardCopy II, MAX II, Stratix
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: PCI Compiler, Master/Target, 32 bit
• License: Initial License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Avalon Configuration
Avalon
Configuration
6–16
PCI Compiler User Guide
Example
Table 6–1. Determining the Size and Avalon Base Address of a BAR
A
B
C
End1 = 0x0001_FFFF
Base1 = 0x0001_0000
End2 = 0x0A80_0FFF
Base2 = 0x0A80_0000
End 1 = 0x0A00_7FFF
Base1 = 0x0A00_4000
End2 = 0x0A00_8FFF
Base2 = 0x0A00_8000
End 1 = 0x0A00_7FFF
Base1 = 0x0A00_4000
Avalon Peripheral
Setting
In some cases, you should try to adjust the Base Address of some
peripherals to help reduce the amount of address space you reserve with
the PCI BAR. In
Example C is the location of the second peripheral. In Example B the BAR
size is 16 MBytes, while in Example C the size is 64 KBytes.
The Avalon Configuration tab of the PCI Compiler wizard is used to
configure the address mapping from Avalon-MM addresses to PCI
addresses. This map can be dynamically configured at run time or
hardwired. If you choose to hardwire the map, the controls on this page
are used to define the hardwired map.
1
Under Address Translation Table Configuration, selecting either
Dynamic Translation Table or Fixed Translation Table options
determines the maximum number of pages for the window from Avalon
to PCI. If you select Fixed Translation Table, the number of pages is
limited to 16. The maximum number of pages for a dynamically
configured address map is 512.
In the Address Translation Table Size field, you set the number and size
of address pages. The lower limit on the size of the pages is 4 KBytes and
the upper limit is 2 GBytes. The maximum number of pages is limited by
either the decision to hardwire the map or the size of the page. The
maximum number of pages is the smaller of:
If you select the PCI Target-Only Peripheral mode from the
System Options - 1 tab, all options on the Avalon
Configuration tab, except Avalon CRA Port, will be disabled.
W = 16
Size = 2
Base = 0x0001_0000
W = 8
Size = 2
Base = 0x0A00_4000
W = 16
Size = 2
Base = 0x0A00_4000
PCI Compiler Version 10.1
Table 6–1
(32-16)
24
16
Calculations
= 16 MBytes
= 64 KBytes
= 2
16
the only difference between Example B and
= 64K
BAR size = 64 KBytes – 16 bits
Avalon Base Address = 0x0001_0000
BAR Size = 16 MBytes – 24 bits
Avalon Base Address = 0x0A00_0000
BAR Size = 64 KBytes – 16 bits
Avalon Base Address = 0x0A00_0000
PCI BAR Setting
Altera Corporation
January 2011