XC908AS60ACFU Motorola Semiconductor Products, XC908AS60ACFU Datasheet - Page 133
XC908AS60ACFU
Manufacturer Part Number
XC908AS60ACFU
Description
MC68HC908AZ60A, MC68HC908AS60A Hcmos Microcontroller Unit Technical Data
Manufacturer
Motorola Semiconductor Products
Datasheet
1.XC908AS60ACFU.pdf
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8.4.5 Condition code register (CCR)
MC68HC908AZ60A — Rev 2.0
MOTOROLA
CCR
PC
Reset:
Read:
Write:
Reset:
Read:
Write:
During reset, the program counter is loaded with the reset vector
address located at $FFFE and $FFFF. The vector address is the
address of the first instruction to be executed after exiting the reset state.
The 8-bit condition code register contains the interrupt mask and five
flags that indicate the results of the instruction just executed. Bits 6 and
5 are set permanently to ‘1’. The following paragraphs describe the
functions of the condition code register.
V — Overflow flag
The CPU sets the overflow flag when a two's complement overflow
occurs. The signed branch instructions BGT, BGE, BLE, and BLT use
the overflow flag.
X = Indeterminate
Bit
15
1 = Overflow
0 = No overflow
Bit 7
X
V
Figure 8-6. Condition code register (CCR)
14
Central Processor Unit (CPU)
Figure 8-5. Program counter (PC)
13
6
1
1
12
Loaded with vector from $FFFE and $FFFF
11
5
1
1
10
9
H
X
4
8
7
3
1
I
6
Central Processor Unit (CPU)
5
N
X
2
4
3
1
Z
X
Technical Data
CPU registers
2
1
Bit 0
C
X
133
Bit
0
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