XC908AS60ACFU Motorola Semiconductor Products, XC908AS60ACFU Datasheet - Page 568
XC908AS60ACFU
Manufacturer Part Number
XC908AS60ACFU
Description
MC68HC908AZ60A, MC68HC908AS60A Hcmos Microcontroller Unit Technical Data
Manufacturer
Motorola Semiconductor Products
Datasheet
1.XC908AS60ACFU.pdf
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Glossary
input/output (I/O) — Input/output interfaces between a computer system and the external world.
instructions — Operations that a CPU can perform. Instructions are expressed by programmers
interrupt — A temporary break in the sequential execution of a program to respond to signals
interrupt request — A signal from a peripheral to the CPU intended to cause the CPU to
I/O — See “input/output (I/0).”
IRQ — See "external interrupt module (IRQ)."
jitter — Short-term signal instability.
latch — A circuit that retains the voltage level (logic 1 or logic 0) written to it for as long as power
latency — The time lag between instruction completion and data movement.
least significant bit (LSB) — The rightmost digit of a binary number.
logic 1 — A voltage level approximately equal to the input power voltage (V
logic 0 — A voltage level approximately equal to the ground voltage (V
low byte — The least significant eight bits of a word.
low voltage inhibit module (LVI) — A module in the M68HC08 Family that monitors power
LVI — See "low voltage inhibit module (LVI)."
M68HC08 — A Motorola family of 8-bit MCUs.
mark/space — The logic 1/logic 0 convention used in formatting data in serial communication.
Technical Data
568
A CPU reads an input to sense the level of an external signal and writes to an output to
change the level on an external signal.
as assembly language mnemonics. A CPU interprets an opcode and its associated
operand(s) and instruction.
from peripheral devices by executing a subroutine.
execute a subroutine.
is applied to the circuit.
supply voltage.
Glossary
MC68HC908AZ60A — Rev 2.0
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MOTOROLA
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