XC908AS60ACFU Motorola Semiconductor Products, XC908AS60ACFU Datasheet - Page 346
XC908AS60ACFU
Manufacturer Part Number
XC908AS60ACFU
Description
MC68HC908AZ60A, MC68HC908AS60A Hcmos Microcontroller Unit Technical Data
Manufacturer
Motorola Semiconductor Products
Datasheet
1.XC908AS60ACFU.pdf
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Programmable Interrupt Timer (PIT)
21.5 PIT Counter Prescaler
21.6 Low-Power Modes
21.6.1 Wait Mode
21.6.2 Stop Mode
Technical Data
346
The clock source can be one of the seven prescaler outputs. The
prescaler generates seven clock rates from the internal bus clock. The
prescaler select bits, PPS[2:0], in the status and control register select
the PIT clock source.
The value in the PIT counter modulo registers and the selected prescaler
output determines the frequency of the periodic interrupt. The PIT
overflow flag (POF) is set when the PIT counter value reaches the
modulo value programmed in the PIT counter modulo registers. The PIT
interrupt enable bit, POIE, enables PIT overflow CPU interrupt requests.
POF and POIE are in the PIT status and control register.
The WAIT and STOP instructions put the MCU in low power-consump-
tion standby modes.
The PIT remains active after the execution of a WAIT instruction. In wait
mode the PIT registers are not accessible by the CPU. Any enabled CPU
interrupt request from the PIT can bring the MCU out of wait mode.
If PIT functions are not required during wait mode, reduce power
consumption by stopping the PIT before executing the WAIT instruction.
The PIT is inactive after the execution of a STOP instruction. The STOP
instruction does not affect register conditions or the state of the PIT
counter. PIT operation resumes when the MCU exits stop mode after an
external interrupt.
Programmable Interrupt Timer (PIT)
MC68HC908AZ60A — Rev 2.0
MOTOROLA
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