XC908AS60ACFU Motorola Semiconductor Products, XC908AS60ACFU Datasheet - Page 449

• Manufacturer Part Number: XC908AS60ACFU
• Description: MC68HC908AZ60A, MC68HC908AS60A Hcmos Microcontroller Unit Technical Data
• Manufacturer: Motorola Semiconductor Products

25.4.4 Pulse Width Modulation (PWM)
MC68HC908AZ60A — Rev 2.0
MOTOROLA
NOTE:
TIMA channel 4 registers initially controls the output on the PTF2 pin.
Writing to the TIMA channel 5 registers enables the TIMA channel 5
registers to synchronously control the output after the TIMA overflows.
At each subsequent overflow, the TIMA channel registers (4 or 5) that
control the output are the ones written to last. TASC4 controls and
monitors the buffered output compare function and TIMA channel 5
status and control register (TASC5) is unused. While the MS4B bit is set,
the channel 5 pin, PTF3, is available as a general-purpose I/O pin.
In buffered output compare operation, do not write new output compare
values to the currently active channel registers. User software should
track the currently active channel to prevent writing a new value to the
active channel. Writing to the active channel registers is the same as
generating unbuffered output compares.
By using the toggle-on-overflow feature with an output compare channel,
the TIMA can generate a PWM signal. The value in the TIMA counter
modulo registers determines the period of the PWM signal. The channel
pin toggles when the counter reaches the value in the TIMA counter
modulo registers. The time between overflows is the period of the PWM
signal.
As
registers determines the pulse width of the PWM signal. The time
between overflow and output compare is the pulse width. Program the
TIMA to clear the channel pin on output compare if the state of the PWM
pulse is logic 1. Program the TIMA to set the pin if the state of the PWM
pulse is logic 0.
Figure 25-3
Timer Interface Module A (TIMA)
shows, the output compare value in the TIMA channel
Timer Interface Module A (TIMA)
Functional Description
Technical Data
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