XC908AS60ACFU Motorola Semiconductor Products, XC908AS60ACFU Datasheet - Page 153
XC908AS60ACFU
Manufacturer Part Number
XC908AS60ACFU
Description
MC68HC908AZ60A, MC68HC908AS60A Hcmos Microcontroller Unit Technical Data
Manufacturer
Motorola Semiconductor Products
Datasheet
1.XC908AS60ACFU.pdf
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9.4.2 Active Resets from Internal Sources
MC68HC908AZ60A — Rev 2.0
MOTOROLA
CGMOUT
RST
IAB
PC
All internal reset sources actively pull the RST pin low for 32 CGMXCLK
cycles to allow resetting of external peripherals. The internal reset signal
IRST continues to be asserted for an additional 32 cycles (see
5). An internal reset can be caused by an illegal address, illegal opcode,
COP timeout, LVI, or POR (see
resets, the SIM cycles through 4096 CGMXCLK cycles during which the
SIM forces the RST pin low. The internal reset signal then follows the
sequence from the falling edge of RST shown in
The COP reset is asynchronous to the bus clock.
The active reset feature allows the part to issue a reset to peripherals
and other chips within a system built around the MCU.
CGMXCLK
IRST
RST
IAB
Figure 9-4. External Reset Timing
System Integration Module (SIM)
Figure 9-5. Internal Reset Timing
RST PULLED LOW BY MCU
32 CYCLES
Figure
VECT H
9-6). Note that for LVI or POR
VECT L
System Integration Module (SIM)
32 CYCLES
Reset and System Initialization
Figure
9-5.
VECTOR HIGH
Technical Data
Figure 9-
153
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